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    Subject[PATCH V2 6/6] arm64: dts: imx8ulp: increase the clock speed of LPSPI
    Date
    From: Clark Wang <xiaoning.wang@nxp.com>

    LPSPI transfer max speed is half of the root clock.
    Increase the root clock speed to support faster data transmission.

    And update the parent clock of all i2c/spi with IMX8ULP_CLK_FROSC_DIV2
    which could produce accurate clock for i2c/spi usage.

    Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
    Reviewed-by: Jun Li <jun.li@nxp.com>
    Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    ---
    arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 16 ++++++++--------
    1 file changed, 8 insertions(+), 8 deletions(-)

    diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
    index d95c0e9b15d6..06ce5f19aa8a 100644
    --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
    +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
    @@ -224,7 +224,7 @@ lpi2c4: i2c@29370000 {
    <&pcc3 IMX8ULP_CLK_LPI2C4>;
    clock-names = "per", "ipg";
    assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>;
    - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
    + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
    assigned-clock-rates = <48000000>;
    status = "disabled";
    };
    @@ -237,7 +237,7 @@ lpi2c5: i2c@29380000 {
    <&pcc3 IMX8ULP_CLK_LPI2C5>;
    clock-names = "per", "ipg";
    assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>;
    - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
    + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
    assigned-clock-rates = <48000000>;
    status = "disabled";
    };
    @@ -270,8 +270,8 @@ lpspi4: spi@293b0000 {
    <&pcc3 IMX8ULP_CLK_LPSPI4>;
    clock-names = "per", "ipg";
    assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>;
    - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
    - assigned-clock-rates = <16000000>;
    + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
    + assigned-clock-rates = <48000000>;
    status = "disabled";
    };

    @@ -285,8 +285,8 @@ lpspi5: spi@293c0000 {
    <&pcc3 IMX8ULP_CLK_LPSPI5>;
    clock-names = "per", "ipg";
    assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI5>;
    - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
    - assigned-clock-rates = <16000000>;
    + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
    + assigned-clock-rates = <48000000>;
    status = "disabled";
    };
    };
    @@ -313,7 +313,7 @@ lpi2c6: i2c@29840000 {
    <&pcc4 IMX8ULP_CLK_LPI2C6>;
    clock-names = "per", "ipg";
    assigned-clocks = <&pcc4 IMX8ULP_CLK_LPI2C6>;
    - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
    + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
    assigned-clock-rates = <48000000>;
    status = "disabled";
    };
    @@ -326,7 +326,7 @@ lpi2c7: i2c@29850000 {
    <&pcc4 IMX8ULP_CLK_LPI2C7>;
    clock-names = "per", "ipg";
    assigned-clocks = <&pcc4 IMX8ULP_CLK_LPI2C7>;
    - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
    + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
    assigned-clock-rates = <48000000>;
    status = "disabled";
    };
    --
    2.37.1
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