Messages in this thread Patch in this message | | | From | Lad Prabhakar <> | Subject | [PATCH v2] dt-bindings: display: bridge: renesas,dw-hdmi: Add resets property | Date | Wed, 31 Aug 2022 22:35:36 +0100 |
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The DWC HDMI blocks on R-Car and RZ/G2 SoC's use resets, so to complete the bindings include resets property.
This also fixes the below warning when running dtbs_check: arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: hdmi@fead0000: Unevaluated properties are not allowed ('resets' was unexpected) From schema: Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
While at it mark resets property as required as all the DT sources in the kernel specify resets and update the example node.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> --- v1->v2 * Updated commit message * Marked resets as required property * Updated the example node * Included RB tag from Laurent
v1: https://lore.kernel.org/lkml/20220829215816.6206-1-prabhakar.mahadev-lad.rj@bp.renesas.com/ --- .../devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml index 0c9785c8db51..e3ec697f89e7 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml @@ -38,6 +38,9 @@ properties: clock-names: maxItems: 2 + resets: + maxItems: 1 + ports: $ref: /schemas/graph.yaml#/properties/ports @@ -67,6 +70,7 @@ required: - reg - clocks - clock-names + - resets - interrupts - ports @@ -85,6 +89,7 @@ examples: clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>; clock-names = "iahb", "isfr"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 729>; ports { #address-cells = <1>; -- 2.25.1
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