lkml.org 
[lkml]   [2022]   [Aug]   [30]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: pcieport bug?
On Mon, Aug 29, 2022 at 03:14:23PM -0700, Randy Dunlap wrote:
> On 8/29/22 10:59, Steven J Abner wrote:
> > Hi
> > Building a kernel tailored for AMD 2400g on ASRock B450 using 5.18.12 as base, OS
> > is Elementary 6.1 on top of Ubuntu 20.04.5.
> > In a config I changed some which lead to this query,'cause not sure what it means.
> > So up to you see if it is of concern. Notation igpu# refers to build sequence tests.
> > Also note that pcieport may affect other drivers?

igpu32 is built with CONFIG_PCIEPORTBUS=y and igpu33 is built with
CONFIG_PCIEPORTBUS not set. Both are built from the same kernel
version. Right?

And you see some lspci differences bewteen igpu32 and igpu33?

Is there something that does not work as you expect it to work?

Obviously with CONFIG_PCIEPORTBUS not set, we expect things that
depend on PCIEPORTBUS will not work. This includes AER, hotplug, PME,
DPC, etc.

If you're seeing something unexpected, can you collect the complete
dmesg log and complete "sudo lspci -vv" output for both cases? If
they're too big for email, you can open a report at
https://bugzilla.kernel.org and attach them there.

> > config differences
> > igpu33
> > # CONFIG_PCIEPORTBUS is not set
> > # CONFIG_PCI_IOV is not set
> > # CONFIG_VGA_ARB is not set
> > # CONFIG_HOTPLUG_PCI is not set
> > igpu32
> > CONFIG_PCIEPORTBUS=y
> > CONFIG_HOTPLUG_PCI_PCIE=y
> > CONFIG_PCIEAER=y
> > # CONFIG_PCIEAER_INJECT is not set
> > # CONFIG_PCIE_ECRC is not set
> > CONFIG_PCIE_PME=y
> > CONFIG_PCIE_DPC=y
> > # CONFIG_PCIE_EDR is not set
> > CONFIG_PCI_REALLOC_ENABLE_AUTO=y
> > # CONFIG_PCI_PF_STUB is not set
> > CONFIG_PCI_IOV=y
> > CONFIG_VGA_ARB=y
> > CONFIG_VGA_ARB_MAX_GPUS=16
> > CONFIG_HOTPLUG_PCI=y
> > CONFIG_HOTPLUG_PCI_ACPI=y
> > # CONFIG_HOTPLUG_PCI_ACPI_IBM is not set
> > CONFIG_HOTPLUG_PCI_CPCI=y
> > # CONFIG_HOTPLUG_PCI_CPCI_ZT5550 is not set
> > # CONFIG_HOTPLUG_PCI_CPCI_GENERIC is not set
> > CONFIG_HOTPLUG_PCI_SHPC=y
> > # CONFIG_RAPIDIO_TSI721 is not set
> > # CONFIG_EEEPC_LAPTOP is not set
> >
> > lspci differences:
> > start with identical:
> > 00:00.0 Host bridge
> > 00:00.2 IOMMU
> > 00:01.0 Host bridge
> >
> > kernel builds after igpu33 stable flags, only irq differences
> > kernel builds upto igpu32 flags differ including non-pcieport drivers,
> > there was a few builds where flags matched out of 32 different builds
> > I thought was normal that flags changed prior to 33-37 being very stable.
> >
> > under 00:01.1 PCI bridge:
> > igpu33
> > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> > DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
> > RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible+
> > Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
> >  Address: 0000000000000000 Data: 0000
> > RootCmd: CERptEn- NFERptEn- FERptEn-
> >
> > igpu32
> > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
> > Interrupt: pin ? routed to IRQ 26
> > DevCtl: CorrErr+ NonFatalErr+ FatalErr+ UnsupReq+
> > RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible+
> > Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
> >  Address: 00000000fee00000 Data: 0000
> > RootCmd: CERptEn+ NFERptEn+ FERptEn+
> > Kernel driver in use: pcieport
> >
> > under these, nearly same readout as above (32vs33 use of pcieport)
> > 00:01.6 PCI bridge
> > 00:08.1 PCI bridge
> > 00:08.2 PCI bridge
> > 11:01.0 PCI bridge
> > 11:02.0 PCI bridge
> > 15:00.2 PCI bridge
> > 1d:00.0 PCI bridge
> > 1d:01.0 PCI bridge
> > 1d:04.0 PCI bridge
> > 1d:05.0 PCI bridge
> > 1d:06.0 PCI bridge
> > 1d:07.0 PCI bridge
> >
> > on non-pcieport drivers minor differences in +- states
> > on nvme added line:
> > Physical Slot: 0
> > but +- state can change like others
> >
> > dmesg differences (alphabetical):
> > igu33
> > acpi PNP0A08:00: PCIe port services disabled; not requesting _OSC control
> > igpu32
> > acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
> > acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
> > acpi PNP0A08:00: _OSC: platform does not support [SHPCHotplug LTR]
> > amdgpu 0000:38:00.0: vgaarb: deactivate vga console
> > pci 0000:38:00.0: vgaarb: bridge control possible
> > pci 0000:38:00.0: vgaarb: setting as boot VGA device
> > pci 0000:38:00.0: vgaarb: VGA device added: decodes=io+mem,owns=none,locks=none
> > pcieport 0000:00:01.1: AER: enabled with IRQ 26
> > pcieport 0000:00:01.1: PME: Signaling with IRQ 26
> > pcieport 0000:00:01.2: AER: enabled with IRQ 27
> > pcieport 0000:00:01.2: PME: Signaling with IRQ 27
> > pcieport 0000:00:01.6: AER: enabled with IRQ 28
> > pcieport 0000:00:01.6: pciehp: Slot #0 AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise- Interlock- NoCompl+ IbPresDis- LLActRep+
> > pcieport 0000:00:01.6: PME: Signaling with IRQ 28
> > pcieport 0000:00:08.1: PME: Signaling with IRQ 29
> > pcieport 0000:00:08.2: PME: Signaling with IRQ 30
> > shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
> > vgaarb: loaded
> >
> > Steve
> >
> > I wish to be personally CC'ed the answers/comments posted to the list
> > in response to your posting, please.
> --
> ~Randy

\
 
 \ /
  Last update: 2022-08-30 22:08    [W:0.103 / U:0.848 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site