Messages in this thread | | | Date | Tue, 30 Aug 2022 10:08:49 -0700 | From | Jacob Pan <> | Subject | Re: [PATCH 0/2] Use the correct page tables for SVA under PTI |
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Hi Baolu/Joerg,
Just wondering if you have any comments? Thanks.
On Mon, 22 Aug 2022 13:12:11 -0700, Jacob Pan <jacob.jun.pan@linux.intel.com> wrote:
> Shared virtual addressing allows DMA to user virtual address, But the > x86 IOMMU drivers are using the kernel copy of the process page tables > when PTI is enabled. This patchset tightens the security intended by > PTI by performing SVA binding with the appropriate process PGDs. > > I have tested on Intel platform only, would appreciate itif someone > could help with testing SVA-KPTI on an AMD system. > > Jacob Pan (2): > x86: mm: Allow PTI helpers to be used outside x86/mm > iommu: Use the user PGD for SVA if PTI is enabled > > arch/x86/include/asm/pgtable.h | 5 +++++ > drivers/iommu/amd/iommu_v2.c | 4 +++- > drivers/iommu/intel/svm.c | 5 ++++- > 3 files changed, 12 insertions(+), 2 deletions(-) >
Thanks,
Jacob
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