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SubjectRe: [PATCH 00/11] Add support for enhanced SPI for Designware SPI controllers
Hi Sudip

On Tue, Aug 02, 2022 at 06:57:44PM +0100, Sudip Mukherjee wrote:
> Some Synopsys SSI controllers support enhanced SPI which includes
> Dual mode, Quad mode and Octal mode. DWC_ssi includes clock stretching
> feature in enhanced SPI modes which can be used to prevent FIFO underflow
> and overflow conditions while transmitting or receiving the data respectively.
> This is only tested on controller version 1.03a.
> Ben Dooks (1):
> spi: dw-apb-ssi: add generic 1.03a version

Thanks for the patchset. It's always welcome to have a new
functionality support. I'll have it reviewed on the next week. There
are several aspects like using version-based compatible string and new
capability flag I am the most worried about. They need to be
discussed first before proceeding with the rest of the things.


> Sudip Mukherjee (10):
> spi: dw: define capability for enhanced spi
> spi: dw: add check for support of dual/quad/octal
> spi: dw: define spi_frf for dual/quad/octal modes
> spi: dw: use TMOD_RO to read in enhanced spi modes
> spi: dw: define SPI_CTRLR0 register and its fields
> spi: dw: update SPI_CTRLR0 register
> spi: dw: update NDF while writing in enhanced spi mode
> spi: dw: update buffer for enhanced spi mode
> spi: dw: prepare the transfer routine for enhanced mode
> spi: dw: initialize dwc-ssi-1.03a controller
> .../bindings/spi/snps,dw-apb-ssi.yaml | 1 +
> drivers/spi/spi-dw-core.c | 288 ++++++++++++++++--
> drivers/spi/spi-dw-mmio.c | 10 +
> drivers/spi/spi-dw.h | 19 ++
> 4 files changed, 291 insertions(+), 27 deletions(-)
> --
> 2.30.2

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