Messages in this thread | | | Date | Thu, 25 Aug 2022 12:55:18 +0200 | Subject | Re: [PATCH] dt-bindings: arm: mediatek: mmsys: change compatible for MT8195 | From | Matthias Brugger <> |
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On 25/08/2022 08:59, Bo-Chen Chen wrote: > On Thu, 2022-08-25 at 14:11 +0800, Krzysztof Kozlowski wrote: >> On 25/08/2022 08:56, Bo-Chen Chen wrote: >>> From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com> >>> >>> For previous MediaTek SoCs, such as MT8173, there are 2 display HW >>> pipelines binding to 1 mmsys with the same power domain, the same >>> clock driver and the same mediatek-drm driver. >>> >>> For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding >>> to >>> 2 different power domains, different clock drivers and different >>> mediatek-drm drivers.
drop clock driver example here.
>> >> I don't see binding to different clock drivers and anyway that's not >> really an argument here. Please focus in description on hardware >> properties, IOW, are devices compatible or different. What is the >> incompatible difference between VDOSYS0 and 1? >> >> Best regards, >> Krzysztof > > Hello Krzysztof, > > Thanks for yor review. > > From the functions perspective: > > Hardware pipeline of VDOSYS0 has these components: COLOR, CCORR, AAL, > GAMMA, DITHER. > They are related to PQ (Picture Quality) functions and they makes > VDOSYS0 supports PQ function while they are not including in VDOSYS1. > > Hardware pipeline of VDOSYS1 has the component ETHDR (HDR related > component). > It makes VDOSYS1 supports the HDR function while it's not including in > VDOSYS0. >
Please include a description of this in the commit message.
> About mediatek ETHDR, you can refer to this series: > > https://lore.kernel.org/all/20220819061456.8042-2-nancy.lin@mediatek.com/ > > To summary: > Only VDOSYS0 can support PQ adjustment. > Only VDOSYS1 can support HDR adjustment. > > Is this description ok for you? > If it is ok, I will put them into commit message in next version. > > BRs, > Bo-Chen >
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