Messages in this thread | | | Date | Thu, 25 Aug 2022 10:20:34 +0530 | Subject | Re: [PATCH v3 2/5] soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driver | From | Sai Prakash Ranjan <> |
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On 8/25/2022 10:08 AM, Manivannan Sadhasivam wrote: > The LLCC EDAC register offsets varies between each SoCs. Until now, the > EDAC driver used the hardcoded register offsets. But this caused crash > on SM8450 SoC where the register offsets has been changed. > > So to avoid this crash and also to make it easy to accommodate changes for > new SoCs, let's pass the LLCC version specific register offsets to the > EDAC driver. > > Currently, two set of offsets are used. One is starting from LLCC version > v1.0.0 used by all SoCs other than SM8450. For SM8450, LLCC version > starting from v2.1.0 is used. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > drivers/soc/qcom/llcc-qcom.c | 66 ++++++++++++++++++++++++++++++ > include/linux/soc/qcom/llcc-qcom.h | 30 ++++++++++++++ > 2 files changed, 96 insertions(+)
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Thanks, Sai
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