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SubjectRE: [PATCH V2 1/2] bindings: fsl-imx-sdma: Document 'HDMI Audio' transfer
Date
Gentle ping...

BR
Joy Zou
> -----Original Message-----
> From: Joy Zou
> Sent: 2022年8月2日 11:58
> To: vkoul@kernel.org
> Cc: S.J. Wang <shengjiu.wang@nxp.com>; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; shawnguo@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> dl-linux-imx <linux-imx@nxp.com>; dmaengine@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: FW: [PATCH V2 1/2] bindings: fsl-imx-sdma: Document 'HDMI Audio'
> transfer
>
> Gentle ping...
>
> BR
> Joy Zou
>
> -----Original Message-----
> From: Joy Zou
> Sent: 2022年5月24日 16:02
> To: vkoul@kernel.org
> Cc: S.J. Wang <shengjiu.wang@nxp.com>; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; shawnguo@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> dl-linux-imx <linux-imx@nxp.com>; dmaengine@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: [PATCH V2 1/2] bindings: fsl-imx-sdma: Document 'HDMI Audio'
> transfer
>
> Add HDMI Audio transfer type.
>
> convert the sdma bindings txt into yaml in v2.
>
> Signed-off-by: Joy Zou <joy.zou@nxp.com>
> ---
> Changes since v1:
> convert the sdma bindings txt into yaml in v2.
> ---
> .../devicetree/bindings/dma/fsl-imx-sdma.yaml | 135 ++++++++++++++++++
> 1 file changed, 135 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/dma/fsl-imx-sdma.yaml
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.yaml
> b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.yaml
> new file mode 100644
> index 000000000000..5b4f7a09a395
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.yaml
> @@ -0,0 +1,135 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/fsl-imx-sdma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
> +
> +maintainers:
> + - Vinod Koul <vkoul@kernel.org>
> +
> +allOf:
> + - $ref: "dma-controller.yaml#"
> +
> +# Everything else is described in the common file
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - fsl,imx25-sdma
> + - fsl,imx31-sdma
> + - fsl,imx31-to1-sdma
> + - fsl,imx31-to2-sdma
> + - fsl,imx35-to1-sdma
> + - fsl,imx35-to2-sdma
> + - fsl,imx51-sdma
> + - fsl,imx53-sdma
> + - fsl,imx6q-sdma
> + - fsl,imx7d-sdma
> + - fsl,imx6sx-sdma
> + - fsl,imx6ul-sdma
> + - fsl,imx8mm-sdma
> + - fsl,imx8mn-sdma
> + - fsl,imx8mp-sdma
> + - enum:
> + - fsl,imx35-sdma
> + - fsl,imx8mq-sdma
> +
> + reg:
> + description: Should contain SDMA registers location and length
> +
> + interrupts:
> + description: Should contain SDMA interrupt
> +
> + fsl,sdma-ram-script-name:
> + $ref: /schemas/types.yaml#/definitions/string
> + description: Should contain the full path of SDMA RAM scripts firmware.
> +
> + "#dma-cells":
> + const: 3
> + description: |
> + The first cell: request/event ID
> +
> + The second cell: peripheral types ID
> + enum:
> + - MCU domain SSI: 0
> + - Shared SSI: 1
> + - MMC: 2
> + - SDHC: 3
> + - MCU domain UART: 4
> + - Shared UART: 5
> + - FIRI: 6
> + - MCU domain CSPI: 7
> + - Shared CSPI: 8
> + - SIM: 9
> + - ATA: 10
> + - CCM: 11
> + - External peripheral: 12
> + - Memory Stick Host Controller: 13
> + - Shared Memory Stick Host Controller: 14
> + - DSP: 15
> + - Memory: 16
> + - FIFO type Memory: 17
> + - SPDIF: 18
> + - IPU Memory: 19
> + - ASRC: 20
> + - ESAI: 21
> + - SSI Dual FIFO: 22
> + description: needs firmware more than ver 2
> + - Shared ASRC: 23
> + - SAI: 24
> + - HDMI Audio: 25
> +
> + The third cell: transfer priority ID
> + enum:
> + - High: 0
> + - Medium: 1
> + - Low: 2
> +
> + gpr:
> + description: The phandle to the General Purpose Register (GPR) node
> +
> + fsl,sdma-event-remap:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description: |
> + Register bits of sdma event remap, the format is <reg shift val>.
> + - reg: the GPR register offset
> + - shift: the bit position inside the GPR register
> + - val: the value of the bit (0 or 1)
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - fsl,sdma-ram-script-name
> + - "#dma-cells"
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + sdma: dma-controller@83fb0000 {
> + compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
> + reg = <0x83fb0000 0x4000>;
> + interrupts = <6>;
> + #dma-cells = <3>;
> + fsl,sdma-ram-script-name = "sdma-imx51.bin";
> + };
> +
> +#DMA clients connected to the i.MX SDMA controller must use the format
> +#described in the dma-controller.yaml file.
> + - |
> + ssi2: ssi@70014000 {
> + compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
> + reg = <0x70014000 0x4000>;
> + interrupts = <30>;
> + clocks = <&clks 49>;
> + dmas = <&sdma 24 1 0>,
> + <&sdma 25 1 0>;
> + dma-names = "rx", "tx";
> + fsl,fifo-depth = <15>;
> + };
> +
> +...
> --
> 2.25.1

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