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SubjectRe: [PATCH v1 1/1] dt-bindings: phy: ocelot-serdes: convert to YAML
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On 23/08/2022 09:00, Colin Foster wrote:
> Convert the phy-ocelot-serdes device tree binding to the new YAML format.
>
> Additionally, add the file to MAINTAINERS since the original file didn't
> exist.
>
> Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
> ---
> .../bindings/phy/phy-ocelot-serdes.txt | 43 -------------
> .../bindings/phy/phy-ocelot-serdes.yaml | 61 +++++++++++++++++++
> MAINTAINERS | 1 +
> 3 files changed, 62 insertions(+), 43 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
> create mode 100644 Documentation/devicetree/bindings/phy/phy-ocelot-serdes.yaml

Filename based on compatible, so
mscc,vsc7514-serdes.yaml

>


> diff --git a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.yaml b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.yaml
> new file mode 100644
> index 000000000000..0666974d886a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/phy-ocelot-serdes.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microsemi Ocelot SerDes muxing driver

s/driver//

Bindings are for hardware, not for Linux drivers.

> +
> +maintainers:
> + - Alexandre Belloni <alexandre.belloni@bootlin.com>
> + - UNGLinuxDriver@microchip.com
> +
> +description: |
> + On Microsemi Ocelot, there is a handful of registers in HSIO address
> + space for setting up the SerDes to switch port muxing.
> +
> + A SerDes X can be "muxed" to work with switch port Y or Z for example.
> + One specific SerDes can also be used as a PCIe interface.
> +
> + Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
> +
> + There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
> + half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
> + 10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
> +
> + Also, SERDES6G number (aka "macro") 0 is the only interface supporting
> + QSGMII.
> +
> + This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
> + Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.
> +
> +properties:
> + compatible:
> + enum:
> + - mscc,vsc7514-serdes

Missing blank line

> + "#phy-cells":
> + const: 2
> + description: |
> + from the generic phy bindings, must be 2.

Skip first sentence, it's obvious.

The first number
> + defines the input port to use for a given SerDes macro. The
> + second defines the macro to use. They are defined in
> + dt-bindings/phy/phy-ocelot-serdes.h
> +
> +required:
> + - compatible
> + - "#phy-cells"

Missing additionalProperties: false

Base your YAML on example-schema.

> +
> +examlpes:

Typo.


> + - |
> + serdes: serdes {
> + compatible = "mscc,vsc7514-serdes";
> + #phy-cells = <2>;
> + };
> +
> + ethernet {
> + port1 {
> + phy-handle = <&phy_foo>;
> + /* Link SERDES1G_5 to port1 */
> + phys = <&serdes 1 SERDES1G_5>;
> + };
> + };

Skip consumer examples in provider bindings. They're obvious.

> diff --git a/MAINTAINERS b/MAINTAINERS
> index 714fd8b45e5a..10dd3c6ad6ad 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -13481,6 +13481,7 @@ M: UNGLinuxDriver@microchip.com
> L: linux-mips@vger.kernel.org
> S: Supported
> F: Documentation/devicetree/bindings/mips/mscc.txt
> +F: Documentation/devicetree/bindings/phy/phy-ocelot-serdes.yaml
> F: Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml
> F: Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
> F: arch/mips/boot/dts/mscc/


Best regards,
Krzysztof

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