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Subject[PATCH 11/11] soundwire: intel: cleanup WakeEnable and WakeStatus
Date
From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>

Regroup offset and bitfield definitions.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
include/linux/soundwire/sdw_intel.h | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h
index 3a56fd5a6331..2e9fd91572d4 100644
--- a/include/linux/soundwire/sdw_intel.h
+++ b/include/linux/soundwire/sdw_intel.h
@@ -76,9 +76,16 @@
#define SDW_SHIM_IOCTL_CIBD BIT(8)
#define SDW_SHIM_IOCTL_DIBD BIT(9)

+/* Wake Enable*/
#define SDW_SHIM_WAKEEN 0x190
+
+#define SDW_SHIM_WAKEEN_ENABLE BIT(0)
+
+/* Wake Status */
#define SDW_SHIM_WAKESTS 0x192

+#define SDW_SHIM_WAKESTS_STATUS BIT(0)
+
/* AC Timing control */
#define SDW_SHIM_CTMCTL(x) (0x06E + 0x60 * (x))

@@ -86,9 +93,6 @@
#define SDW_SHIM_CTMCTL_DODS BIT(1)
#define SDW_SHIM_CTMCTL_DOAIS GENMASK(4, 3)

-#define SDW_SHIM_WAKEEN_ENABLE BIT(0)
-#define SDW_SHIM_WAKESTS_STATUS BIT(0)
-
/* Intel ALH Register definitions */
#define SDW_ALH_STRMZCFG(x) (0x000 + (0x4 * (x)))
#define SDW_ALH_NUM_STREAMS 64
--
2.25.1
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