Messages in this thread | | | From | Huacai Chen <> | Date | Wed, 24 Aug 2022 09:38:29 +0800 | Subject | Re: mainline build failure for loongarch allmodconfig with gcc-12 |
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Hi, Linus,
On Wed, Aug 24, 2022 at 2:09 AM Linus Torvalds <torvalds@linux-foundation.org> wrote: > > On Tue, Aug 23, 2022 at 1:34 AM Sudip Mukherjee (Codethink) > <sudipm.mukherjee@gmail.com> wrote: > > > > I have been trying to build loongarch as part of my nightly builds, and > > I can build loongson3_defconfig without any error. But allmodconfig fails > > with the error: > > > > In function '__cmpxchg', > > inlined from 'ssh_seq_next' at drivers/platform/surface/aggregator/controller.c:61:9, > > Looks like ssh_seq_next() wants to do an atomic cmpxchg() on a single > byte value, and the Loongarch implementation only does 4- and 8-byte > versions. > > It looks like loongarch - from its MIPS heritage - inherited the "we > can't do atomics on byte variables", so that it needs the same strange > "do bytes as word accesses with mask-and-shifts". > > For MIPS, the code is in __xchg_small() in arch/mips/kernel/cmpxchg.c. > > Alpha has something similar, except it's all done in inline asm in > arch/alpha/include/asm/xchg.h (look for "____cmpxchg(_u8," in there. > > Of course, we could just add a Kconfig variable like > "ARCH_LACKS_BYTE_ATOMICS" and make that driver depend on it not being > true, and just have Loongarch set it. > > But I think loongarch should just implement the byte masking stuff. > Particularly since I suspect it can just copy the MIPS code as-is. Yes, I agree. There is already a proposed patch to do this [1]. It was discussed for a long time about the "forward progress", but I think that problem is solved because LoongArch has "exclusive access (with timeout) of ll" and "random delay of sc" in hardware. So I hope this patch can be accepted now.
https://lore.kernel.org/loongarch/CAJF2gTQBjetiA1eDaXhBsiEmRYCdOAAWWAGcwVjhZTBYH5BpGQ@mail.gmail.com/T/#m9df7f86d9509cec23a66a0304152377e1070b62e
Huacai > > Linus
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