Messages in this thread | | | Date | Tue, 23 Aug 2022 13:10:44 +0200 | From | Greg KH <> | Subject | Re: [PATCH 5.19 332/365] riscv: dts: sifive: Add fu540 topology information |
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On Tue, Aug 23, 2022 at 09:49:35AM +0000, Conor.Dooley@microchip.com wrote: > On 23/08/2022 09:03, Greg Kroah-Hartman wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > From: Conor Dooley <conor.dooley@microchip.com> > > > > [ Upstream commit af8f260abc608c06e4466a282b53f1e2dc09f042 ] > > > > The fu540 has no cpu-map node, so tools like hwloc cannot correctly > > parse the topology. Add the node using the existing node labels. > > > > Reported-by: Brice Goglin <Brice.Goglin@inria.fr> > > Link: https://github.com/open-mpi/hwloc/issues/536 > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > > Link: https://lore.kernel.org/r/20220705190435.1790466-3-mail@conchuod.ie > > Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> > > Signed-off-by: Sasha Levin <sashal@kernel.org> > > Hey Greg, > I pointed out on the AUTOSEL'd version of these patches that > adding the optional dt property papers over the problem rather than > really fixing it & Sudeep suggested the time that these patches were > not stable worthy, hence the lack of a CC: stable. > > The following has been merged into riscv/for-next & is pending for > arm64/driver core as an actual fix for RISC-V's default topology > reporting: > https://lore.kernel.org/linux-riscv/4849490e-b362-c13a-c2e4-82acc3268a3f@microchip.com/#t > > As I said to Sasha, I defer to your (plural) better judgement here, > but just so that you're aware of the context.
Thanks for letting me know, I've now dropped it from all stable release queues.
greg k-h
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