Messages in this thread | | | Date | Mon, 22 Aug 2022 11:20:05 -0400 | Subject | Re: [RESEND PATCH] perf/x86/intel: Fix unchecked MSR access error for Alder Lake N | From | "Liang, Kan" <> |
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On 2022-08-22 9:55 a.m., Peter Zijlstra wrote: > On Mon, Aug 22, 2022 at 09:24:57AM -0400, Liang, Kan wrote: >> I think the only issue should be the PMU name. The non-hybrid PMU name >> is "cpu". The hybrid PMU name is "cpu_$coretype". If we move the >> ALDERLAKE_N to the non-hybrid PMU, the PMU name will be changed from >> "cpu_atom" to "cpu". It will be different from the rest of >> {ALDER,RAPTOP}LAKE. >> >> Also, I think we have to update the perf tool for the events because of >> the PMU name change. >> >> But I guess it should be OK, since the ALDERLAKE_N was just added and we >> know its an Atom-only system. > > cpu/caps/pmu_name should be 'Gracemont', which is exactly like all the > other !hybrid setups. Surely perf-tools already knows about this > pattern. > > IOW, if you need to change perf-tools for this, someone did something > wrong somewhere.
The event list for ADL and RPL is different from the non-hybrid platforms. We combine the events from big core and small core into a single file and use the PMU name to distinguish from them. The PMU name is either cpu_core or cpu_atom.
If we change the ADL-N to non-hybrid, the simplest way is to create a dedicate gracemont event list. Or we have to specially handle the ADL-N in the parsing codes. We have to update the tool for either way.
> > (also, I just noticed, 'Tremont' is the *only* PMU that has a > capitalized name, perhaps we don't want Gracemont to follow but instead > fix tremont if that is still possible)
I don't think the tool rely on the name under cpu/caps/pmu_name. The event list rely on the CPU model number. It should be OK to fix the tremont name.
Thanks, Kan
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