Messages in this thread | | | Date | Mon, 22 Aug 2022 17:08:55 +0200 | Subject | Re: [RESEND PATCH] perf/x86/intel: Fix unchecked MSR access error for Alder Lake N | From | Andi Kleen <> |
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> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c > index 2db93498ff71..232e24324fd7 100644 > --- a/arch/x86/events/intel/core.c > +++ b/arch/x86/events/intel/core.c > @@ -4473,6 +4473,11 @@ static bool init_hybrid_pmu(int cpu) > struct x86_hybrid_pmu *pmu = NULL; > int i; > > + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) { > + pr_warn_once("hybrid PMU and virt are incompatible\n"); > + return false; > + }
It's totally possible to virtualize hybrid correctly, so I don't think this is justified
-Andi
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