Messages in this thread | | | From | Andrew Cooper <> | Subject | Re: [RESEND PATCH] perf/x86/intel: Fix unchecked MSR access error for Alder Lake N | Date | Mon, 22 Aug 2022 14:51:52 +0000 |
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On 22/08/2022 15:39, Peter Zijlstra wrote: > On Mon, Aug 22, 2022 at 09:28:31AM -0400, Liang, Kan wrote: >> >> On 2022-08-19 10:38 a.m., Peter Zijlstra wrote: >>> On Thu, Aug 18, 2022 at 11:15:30AM -0700, kan.liang@linux.intel.com wrote: >>>> From: Kan Liang <kan.liang@linux.intel.com> >>>> >>>> For some Alder Lake N machine, the below unchecked MSR access error may be >>>> triggered. >>>> >>>> [ 0.088017] rcu: Hierarchical SRCU implementation. >>>> [ 0.088017] unchecked MSR access error: WRMSR to 0x38f (tried to write >>>> 0x0001000f0000003f) at rIP: 0xffffffffb5684de8 (native_write_msr+0x8/0x30) >>>> [ 0.088017] Call Trace: >>>> [ 0.088017] <TASK> >>>> [ 0.088017] __intel_pmu_enable_all.constprop.46+0x4a/0xa0 >>> FWIW, I seem to get the same error when booting KVM on my ADL. I'm >>> fairly sure the whole CPUID vs vCPU thing is a trainwreck. >> We will enhance the CPUID to address the issues. Hopefully, we can have >> them supported in the next generation. >> > How about this?
LGTM.
It's not even just uarch problems. There are arch problems too, like the fact that P and E cores disagree on linear vs effective addresses, number of counters, etc.
~Andrew
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