Messages in this thread Patch in this message | | | From | Serge Semin <> | Subject | [PATCH v5 06/20] dt-bindings: PCI: dwc: Add max-link-speed common property | Date | Mon, 22 Aug 2022 21:46:47 +0300 |
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In accordance with [1] DW PCIe controllers support up to Gen5 link speed. Let's add the max-link-speed property upper bound to 5 then. The DT bindings of the particular devices are expected to setup more strict constraint on that parameter.
[1] Synopsys DesignWare Cores PCI Express Controller Databook, Version 5.40a, March 2019, p. 27
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org>
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Changelog v3: - This is a new patch unpinned from the next one: https://lore.kernel.org/linux-pci/20220503214638.1895-2-Sergey.Semin@baikalelectronics.ru/ by the Rob' request. (@Rob) --- Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml | 3 +++ Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 2 ++ Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml | 1 + 3 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml index e8d610d63ae2..5fc704138677 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml @@ -49,6 +49,9 @@ properties: the peripheral devices available on the PCIe bus. maxItems: 1 + max-link-speed: + maximum: 5 + num-lanes: description: Number of PCIe link lanes to use. Can be omitted if the already brought diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml index dcd521aed213..fc3b5d4ac245 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml @@ -55,4 +55,6 @@ examples: phys = <&pcie_phy0>, <&pcie_phy1>, <&pcie_phy2>, <&pcie_phy3>; phy-names = "pcie0", "pcie1", "pcie2", "pcie3"; + + max-link-speed = <3>; }; diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml index d9512f7f7124..e787b9727589 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml @@ -74,4 +74,5 @@ examples: phy-names = "pcie"; num-lanes = <1>; + max-link-speed = <3>; }; -- 2.35.1
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