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Subject[PATCH 4/5] ARM: dts: qcom: use GPIO flags for tlmm
Date
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs.  Include
gpio.h header if this is first usage of that flag.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 3 ++-
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 3 ++-
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 4 ++--
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts | 5 +++--
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 2 +-
5 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
index 3051a861ff0c..91716298ec5e 100644
--- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
@@ -1,4 +1,5 @@
// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/gpio/gpio.h>
#include "qcom-msm8974.dtsi"
#include "qcom-pm8841.dtsi"
#include "qcom-pm8941.dtsi"
@@ -261,7 +262,7 @@ &sdhc_1 {
&sdhc_2 {
status = "okay";

- cd-gpios = <&tlmm 62 0x1>;
+ cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
vmmc-supply = <&pm8941_l21>;
vqmmc-supply = <&pm8941_l13>;

diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index 03bb9e1768c4..0505270cf508 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -14,6 +14,7 @@
*
*/

+#include <dt-bindings/gpio/gpio.h>
#include "qcom-ipq4019.dtsi"

/ {
@@ -72,7 +73,7 @@ spi@78b5000 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
- cs-gpios = <&tlmm 54 0>;
+ cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;

mx25l25635e@0 {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
index 44a9597d8bfd..c2f5222e72de 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -87,7 +87,7 @@ spi@78b5000 { /* BLSP1 QUP1 */
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
- cs-gpios = <&tlmm 12 0>;
+ cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;

flash@0 {
#address-cells = <1>;
@@ -100,7 +100,7 @@ flash@0 {

pci@40000000 {
status = "okay";
- perst-gpio = <&tlmm 38 0x1>;
+ perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
};

qpic-nand@79b0000 {
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
index c7a6e77da272..7fc33149060c 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018, The Linux Foundation. All rights reserved.

+#include <dt-bindings/gpio/gpio.h>
#include "qcom-ipq4019-ap.dk07.1.dtsi"

/ {
@@ -10,7 +11,7 @@ / {
soc {
pci@40000000 {
status = "okay";
- perst-gpio = <&tlmm 38 0x1>;
+ perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
};

spi@78b6000 {
@@ -50,7 +51,7 @@ spi@78b5000 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
- cs-gpios = <&tlmm 12 0>;
+ cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;

flash@0 {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
index ec5d340562b6..6daceaa87802 100644
--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -175,7 +175,7 @@ i2c-gate {
ak8963@f {
compatible = "asahi-kasei,ak8963";
reg = <0x0f>;
- gpios = <&tlmm 67 0>;
+ gpios = <&tlmm 67 GPIO_ACTIVE_HIGH>;
vid-supply = <&pm8941_lvs1>;
vdd-supply = <&pm8941_l17>;
};
--
2.34.1
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