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SubjectRe: [PATCH 3/3] KVM: VMX: Adjust number of LBR records for PERF_CAPABILITIES at refresh
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On 28/7/2022 7:34 am, Sean Christopherson wrote:
> -bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu)
> -{
> - struct x86_pmu_lbr *lbr = vcpu_to_lbr_records(vcpu);
> -
> - return lbr->nr && (vcpu_get_perf_capabilities(vcpu) & PMU_CAP_LBR_FMT);
> -}
> -
> static bool intel_pmu_is_valid_lbr_msr(struct kvm_vcpu *vcpu, u32 index)
> {
> struct x86_pmu_lbr *records = vcpu_to_lbr_records(vcpu);
> @@ -590,7 +583,9 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
> bitmap_set(pmu->all_valid_pmc_idx,
> INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters);
>
> - if (cpuid_model_is_consistent(vcpu))
> + perf_capabilities = vcpu_get_perf_capabilities(vcpu);
> + if (cpuid_model_is_consistent(vcpu) &&
> + (perf_capabilities & PMU_CAP_LBR_FMT))
> x86_perf_get_lbr(&lbr_desc->records);

As one of evil source to add CPUID walk in the critical path:

The x86_perf_get_lbr() is one of the perf interfaces, KVM cannot always trust
that the number of returned lbr_desc->records.nr is always > 0, and if not,
we have to tweak perf_capabilities inside KVM which violates user input again.

Do you have more inputs to address this issue ?

> else
> lbr_desc->records.nr = 0;

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