lkml.org 
[lkml]   [2022]   [Aug]   [2]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
SubjectRe: [PATCH v3] ASoC: dt-bindings: fsl,sai: Convert format to json-schema
From
On 29/07/2022 04:10, Shengjiu Wang wrote:
> Convert the NXP SAI binding to DT schema format using json-schema.
>
> The Synchronous Audio Interface (SAI) provides an interface that
> supports full-duplex serial interfaces with frame synchronization
> formats such as I2S, AC97, TDM, and codec/DSP interfaces.
>
> Beside conversion, 'fsl,shared-interrupt' and '#sound-dai-cells'
> are added for they are already used by some dts.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
> changes in v3
> - address comments from Krzysztof
>
> changes in v2
> - fix exclusive property issue
> - fix order issue of compatible, clock-names, dma-names
>
> .../devicetree/bindings/sound/fsl,sai.yaml | 221 ++++++++++++++++++
> .../devicetree/bindings/sound/fsl-sai.txt | 95 --------
> 2 files changed, 221 insertions(+), 95 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/sound/fsl,sai.yaml
> delete mode 100644 Documentation/devicetree/bindings/sound/fsl-sai.txt
>
> diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml
> new file mode 100644
> index 000000000000..86ee46755b0c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml
> @@ -0,0 +1,221 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/sound/fsl,sai.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Synchronous Audio Interface (SAI).
> +
> +maintainers:
> + - Shengjiu Wang <shengjiu.wang@nxp.com>
> +
> +description: |
> + The SAI is based on I2S module that used communicating with audio codecs,
> + which provides a synchronous audio interface that supports fullduplex
> + serial interfaces with frame synchronization such as I2S, AC97, TDM, and
> + codec/DSP interfaces.
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - fsl,vf610-sai
> + - fsl,imx6sx-sai
> + - fsl,imx6ul-sai
> + - fsl,imx7ulp-sai
> + - fsl,imx8mq-sai
> + - fsl,imx8qm-sai
> + - fsl,imx8ulp-sai
> + - items:
> + - enum:
> + - fsl,imx8mm-sai
> + - fsl,imx8mn-sai
> + - fsl,imx8mp-sai
> + - const: fsl,imx8mq-sai
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: receive and transmit interrupt
> +
> + dmas:
> + maxItems: 2
> +
> + dma-names:
> + maxItems: 2
> +
> + clocks:
> + items:
> + - description: The ipg clock for register access
> + - description: master clock source 0 (obsoleted)
> + - description: master clock source 1
> + - description: master clock source 2
> + - description: master clock source 3
> + - description: PLL clock source for 8kHz series
> + - description: PLL clock source for 11kHz series
> + minItems: 4
> +
> + clock-names:
> + oneOf:
> + - items:
> + - const: bus
> + - const: mclk0
> + - const: mclk1
> + - const: mclk2
> + - const: mclk3
> + - const: pll8k
> + - const: pll11k
> + minItems: 4
> + - items:
> + - const: bus
> + - const: mclk1
> + - const: mclk2
> + - const: mclk3
> + - const: pll8k
> + - const: pll11k
> + minItems: 4
> +
> + lsb-first:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Configures whether the LSB or the MSB is transmitted
> + first for the fifo data. If this property is absent,
> + the MSB is transmitted first as default, or the LSB
> + is transmitted first.
> + type: boolean

The type: boolean goes instead of $ref, not additionally to it. Just
like below...

> +
> + big-endian:
> + description: |
> + required if all the SAI registers are big-endian rather than little-endian.
> + type: boolean

... be consistent.

> +
> + fsl,sai-synchronous-rx:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + SAI will work in the synchronous mode (sync Tx with Rx) which means
> + both the transmitter and the receiver will send and receive data by
> + following receiver's bit clocks and frame sync clocks.
> + type: boolean
> +

Best regards,
Krzysztof

\
 
 \ /
  Last update: 2022-08-02 09:28    [W:0.054 / U:1.020 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site