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    Subject[PATCH 5.10 048/545] mtd: rawnand: arasan: Update NAND bus clock instead of system clock
    Date
    From: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>

    commit 7499bfeedb47efc1ee4dc793b92c610d46e6d6a6 upstream.

    In current implementation the Arasan NAND driver is updating the
    system clock(i.e., anand->clk) in accordance to the timing modes
    (i.e., SDR or NVDDR). But as per the Arasan NAND controller spec the
    flash clock or the NAND bus clock(i.e., nfc->bus_clk), need to be
    updated instead. This patch keeps the system clock unchanged and updates
    the NAND bus clock as per the timing modes.

    Fixes: 197b88fecc50 ("mtd: rawnand: arasan: Add new Arasan NAND controller")
    CC: stable@vger.kernel.org # 5.8+
    Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Link: https://lore.kernel.org/linux-mtd/20220628154824.12222-2-amit.kumar-mahapatra@xilinx.com
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/mtd/nand/raw/arasan-nand-controller.c | 8 ++++----
    1 file changed, 4 insertions(+), 4 deletions(-)

    --- a/drivers/mtd/nand/raw/arasan-nand-controller.c
    +++ b/drivers/mtd/nand/raw/arasan-nand-controller.c
    @@ -283,17 +283,17 @@ static int anfc_select_target(struct nan

    /* Update clock frequency */
    if (nfc->cur_clk != anand->clk) {
    - clk_disable_unprepare(nfc->controller_clk);
    - ret = clk_set_rate(nfc->controller_clk, anand->clk);
    + clk_disable_unprepare(nfc->bus_clk);
    + ret = clk_set_rate(nfc->bus_clk, anand->clk);
    if (ret) {
    dev_err(nfc->dev, "Failed to change clock rate\n");
    return ret;
    }

    - ret = clk_prepare_enable(nfc->controller_clk);
    + ret = clk_prepare_enable(nfc->bus_clk);
    if (ret) {
    dev_err(nfc->dev,
    - "Failed to re-enable the controller clock\n");
    + "Failed to re-enable the bus clock\n");
    return ret;
    }


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