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    Subject[PATCH 5.10 020/545] KVM: x86: Set error code to segment selector on LLDT/LTR non-canonical #GP
    Date
    From: Sean Christopherson <seanjc@google.com>

    commit 2626206963ace9e8bf92b6eea5ff78dd674c555c upstream.

    When injecting a #GP on LLDT/LTR due to a non-canonical LDT/TSS base, set
    the error code to the selector. Intel SDM's says nothing about the #GP,
    but AMD's APM explicitly states that both LLDT and LTR set the error code
    to the selector, not zero.

    Note, a non-canonical memory operand on LLDT/LTR does generate a #GP(0),
    but the KVM code in question is specific to the base from the descriptor.

    Fixes: e37a75a13cda ("KVM: x86: Emulator ignores LDTR/TR extended base on LLDT/LTR")
    Cc: stable@vger.kernel.org
    Signed-off-by: Sean Christopherson <seanjc@google.com>
    Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
    Link: https://lore.kernel.org/r/20220711232750.1092012-3-seanjc@google.com
    Signed-off-by: Sean Christopherson <seanjc@google.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    arch/x86/kvm/emulate.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    --- a/arch/x86/kvm/emulate.c
    +++ b/arch/x86/kvm/emulate.c
    @@ -1809,8 +1809,8 @@ static int __load_segment_descriptor(str
    if (ret != X86EMUL_CONTINUE)
    return ret;
    if (emul_is_noncanonical_address(get_desc_base(&seg_desc) |
    - ((u64)base3 << 32), ctxt))
    - return emulate_gp(ctxt, 0);
    + ((u64)base3 << 32), ctxt))
    + return emulate_gp(ctxt, err_code);
    }

    if (seg == VCPU_SREG_TR) {

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