Messages in this thread | | | Date | Fri, 19 Aug 2022 21:44:44 +0800 | Subject | Re: [PATCH v5 3/4] dt-binding: perf: Add Amlogic DDR PMU | From | Jiucheng Xu <> |
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On 2022/8/18 16:25, Krzysztof Kozlowski wrote: > [ EXTERNAL EMAIL ] > > On 17/08/2022 14:34, Jiucheng Xu wrote: >> Add binding documentation for the Amlogic G12 series DDR >> performance monitor unit. >> >> Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com> > (...) > >> + >> + interrupts: >> + items: >> + - description: The IRQ of the inside timer timeout. >> + >> +required: >> + - compatible >> + - reg >> + - interrupts >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + pmu { >> + #address-cells=<2>; >> + #size-cells=<2>; >> + >> + pmu@ff638000 { >> + > No need for blank line. > >> + compatible = "amlogic,g12a-ddr-pmu"; >> + reg = <0x0 0xff638000 0x0 0x100>, >> + <0x0 0xff638c00 0x0 0x100>; >> + interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>; >> + }; >> + }; > With above fixed: > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Thanks for your valuable comments and I learn a lot from them.
One more question, do you mean after modify the above two places
I could resubmit V6 as the final patch which include your reviewed tag?
> > > Best regards, > Krzysztof > -- Thanks, Jiucheng
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