Messages in this thread | | | Date | Thu, 18 Aug 2022 10:36:26 -0600 | From | Rob Herring <> | Subject | Re: [PATCH v3 1/4] dt-bindings: timer: sifive,clint: add legacy riscv compatible |
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On Wed, Aug 17, 2022 at 09:12:10PM +0100, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > While "real" hardware might not use the compatible string "riscv,clint0" > it is present in the driver & QEMU uses it for automatically generated > virt machine dtbs. To avoid dt-validate problems with QEMU produced > dtbs, such as the following, add it to the binding. > > riscv-virt.dtb: clint@2000000: compatible:0: 'sifive,clint0' is not one of ['sifive,fu540-c000-clint', 'starfive,jh7100-clint', 'canaan,k210-clint'] > > Reported-by: Rob Herring <robh@kernel.org> > Link: https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/ > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > .../bindings/timer/sifive,clint.yaml | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-)
Reviewed-by: Rob Herring <robh@kernel.org>
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