lkml.org 
[lkml]   [2022]   [Aug]   [18]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRe: [PATCH v5 03/26] x86/hyperv: Update 'struct hv_enlightened_vmcs' definition
Date
Sean Christopherson <seanjc@google.com> writes:

> On Tue, Aug 02, 2022, Vitaly Kuznetsov wrote:
>> Updated Hyper-V Enlightened VMCS specification lists several new
>> fields for the following features:
>>
>> - PerfGlobalCtrl
>> - EnclsExitingBitmap
>> - Tsc Scaling
>> - GuestLbrCtl
>> - CET
>> - SSP
>>
>> Update the definition. The updated definition is available only when
>> CPUID.0x4000000A.EBX BIT(0) is '1'. Add a define for it as well.
>>
>> Note: The latest TLFS is available at
>> https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/tlfs/tlfs
>>
>> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
>> Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
>> ---
>> arch/x86/include/asm/hyperv-tlfs.h | 26 ++++++++++++++++++++++++--
>> 1 file changed, 24 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h
>> index 6f0acc45e67a..ebc27017fa48 100644
>> --- a/arch/x86/include/asm/hyperv-tlfs.h
>> +++ b/arch/x86/include/asm/hyperv-tlfs.h
>> @@ -138,6 +138,17 @@
>> #define HV_X64_NESTED_GUEST_MAPPING_FLUSH BIT(18)
>> #define HV_X64_NESTED_MSR_BITMAP BIT(19)
>>
>> +/*
>> + * Nested quirks. These are HYPERV_CPUID_NESTED_FEATURES.EBX bits.
>
> The "quirks" part is very confusing, largely because KVM has a well-established
> quirks mechanism. I also don't see "quirks" anywhere in the TLFS documentation.
> Can the "Nested quirks" part simply be dropped?
>

Yes, it's completely made up (just like I made up
HV_X64_NESTED_EVMCS1_2022_UPDATE), let's drop it.

>> + *
>> + * Note: HV_X64_NESTED_EVMCS1_2022_UPDATE is not currently documented in any
>> + * published TLFS version. When the bit is set, nested hypervisor can use
>> + * 'updated' eVMCSv1 specification (perf_global_ctrl, s_cet, ssp, lbr_ctl,
>> + * encls_exiting_bitmap, tsc_multiplier fields which were missing in 2016
>> + * specification).
>> + */
>> +#define HV_X64_NESTED_EVMCS1_2022_UPDATE BIT(0)
>
> This bit is now defined[*], but the docs says it's only for perf_global_ctrl. Are
> we expecting an update to the TLFS?
>
> Indicates support for the GuestPerfGlobalCtrl and HostPerfGlobalCtrl fields
> in the enlightened VMCS.
>
> [*] https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/tlfs/feature-discovery#hypervisor-nested-virtualization-features---0x4000000a
>

Oh well, better this than nothing. I'll ping the people who told me
about this bit that their description is incomplete.

>> +
>> /*
>> * This is specific to AMD and specifies that enlightened TLB flush is
>> * supported. If guest opts in to this feature, ASID invalidations only
>> @@ -559,9 +570,20 @@ struct hv_enlightened_vmcs {
>> u64 partition_assist_page;
>> u64 padding64_4[4];
>> u64 guest_bndcfgs;
>> - u64 padding64_5[7];
>> + u64 guest_ia32_perf_global_ctrl;
>> + u64 guest_ia32_s_cet;
>> + u64 guest_ssp;
>> + u64 guest_ia32_int_ssp_table_addr;
>> + u64 guest_ia32_lbr_ctl;
>> + u64 padding64_5[2];
>> u64 xss_exit_bitmap;
>> - u64 padding64_6[7];
>> + u64 encls_exiting_bitmap;
>> + u64 host_ia32_perf_global_ctrl;
>> + u64 tsc_multiplier;
>> + u64 host_ia32_s_cet;
>> + u64 host_ssp;
>> + u64 host_ia32_int_ssp_table_addr;
>> + u64 padding64_6;
>> } __packed;
>>
>> #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE 0
>> --
>> 2.35.3
>>
>

--
Vitaly

\
 
 \ /
  Last update: 2022-08-18 17:31    [W:0.138 / U:0.752 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site