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SubjectRe: [PATCH v1 6/7] i2c-mlxbf.c: support BlueField-3 SoC
On Tue, Aug 16, 2022 at 06:54:11PM -0400, Asmaa Mnebhi wrote:
> BlueField-3 SoC has the same I2C IP logic as previous
> BlueField-1 and 2 SoCs but it has different registers' addresses.
> This is an effort to keep this driver generic accross all
> BlueField generations.
> This patch breaks down the "smbus" resource into 3 separate
> resources to enable us to use common registers' offsets for all
> BlueField SoCs:
> struct mlxbf_i2c_resource *timer;
> struct mlxbf_i2c_resource *mst;
> struct mlxbf_i2c_resource *slv;
>
> Of course, all offsets had to be adjusted accordingly, and we took
> this chance to reorganize the macros depending on the register block
> they target.
>
> There are only 2 registers' offsets that do not fit within this
> schema so their offsets are passed as SoC-specific parameters:
> smbus_master_rs_bytes_off
> smbus_master_fsm_off
>
> Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
> Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
> ---
> .../bindings/i2c/mellanox,i2c-mlxbf.yaml | 30 +-

Bindings go in a separate patch.

> MAINTAINERS | 1 +
> drivers/i2c/busses/i2c-mlxbf.c | 397 ++++++++++--------
> 3 files changed, 258 insertions(+), 170 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml
> index 93198d5d43a6..cb3a012914e0 100644
> --- a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml
> +++ b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml
> @@ -8,6 +8,7 @@ title: Mellanox I2C SMBus on BlueField SoCs
>
> maintainers:
> - Khalil Blaiech <kblaiech@nvidia.com>
> + - Asmaa Mnebhi <asmaa@nvidia.com>
>
> allOf:
> - $ref: /schemas/i2c/i2c-controller.yaml#
> @@ -17,11 +18,15 @@ properties:
> enum:
> - mellanox,i2c-mlxbf1
> - mellanox,i2c-mlxbf2
> + - mellanox,i2c-mlxbf3
>
> reg:
> - minItems: 3
> + minItems: 5

You just broke platforms with 3 entries.

> + maxItems: 6
> items:
> - - description: Smbus block registers
> + - description: Smbus timer registers
> + - description: Smbus master registers
> + - description: Smbus slave registers

You can't add new registers at the beginning of the list for existing
users.

Either add to the end or it has to be conditional (if/then schema).

> - description: Cause master registers
> - description: Cause slave registers
> - description: Cause coalesce registers
> @@ -58,7 +63,9 @@ examples:
> - |
> i2c@2804000 {
> compatible = "mellanox,i2c-mlxbf1";
> - reg = <0x02804000 0x800>,
> + reg = <0x02804000 0x40>,
> + <0x02804200 0x200>,
> + <0x02804400 0x200>,
> <0x02801200 0x020>,
> <0x02801260 0x020>;
> interrupts = <57>;
> @@ -68,10 +75,25 @@ examples:
> - |
> i2c@2808800 {
> compatible = "mellanox,i2c-mlxbf2";
> - reg = <0x02808800 0x600>,
> + reg = <0x02808800 0x40>,
> + <0x02808a00 0x200>,
> + <0x02808c00 0x200>,
> <0x02808e00 0x020>,
> <0x02808e20 0x020>,
> <0x02808e40 0x010>;
> interrupts = <57>;
> clock-frequency = <400000>;
> };
> +
> + - |
> + i2c@2808800 {
> + compatible = "mellanox,i2c-mlxbf3";
> + reg = <0x13404480 0x40>,
> + <0x13404200 0x200>,
> + <0x13404000 0x200>,
> + <0x13404400 0x020>,
> + <0x13404420 0x020>,
> + <0x13404440 0x010>;
> + interrupts = <35>;
> + clock-frequency = <400000>;
> + };

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