lkml.org 
[lkml]   [2022]   [Aug]   [17]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
SubjectRe: [PATCH 2/4] ALSA: hda: Rework snd_hdac_stream_reset() to use macros
From
On 8/17/2022 3:11 PM, Amadeusz Sławiński wrote:
> We can use existing macros to poll and update register values instead of
> open coding the functionality.
>
> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
> ---
> sound/hda/hdac_stream.c | 27 +++++++--------------------
> 1 file changed, 7 insertions(+), 20 deletions(-)
>
> diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c
> index f3582012d22f..ce6a2f270445 100644
> --- a/sound/hda/hdac_stream.c
> +++ b/sound/hda/hdac_stream.c
> @@ -10,6 +10,7 @@
> #include <sound/core.h>
> #include <sound/pcm.h>
> #include <sound/hdaudio.h>
> +#include <sound/hdaudio_ext.h>

Eh... and this include addition should not be necessary after I moved
macros in previous patch. I will wait if there are any other comments
and send v2 tomorrow.

> #include <sound/hda_register.h>
> #include "trace.h"
>
> @@ -165,7 +166,6 @@ EXPORT_SYMBOL_GPL(snd_hdac_stop_streams_and_chip);
> void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
> {
> unsigned char val;
> - int timeout;
> int dma_run_state;
>
> snd_hdac_stream_clear(azx_dev);
> @@ -173,30 +173,17 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
> dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START;
>
> snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
> - udelay(3);
> - timeout = 300;
> - do {
> - val = snd_hdac_stream_readb(azx_dev, SD_CTL) &
> - SD_CTL_STREAM_RESET;
> - if (val)
> - break;
> - } while (--timeout);
> +
> + /* wait for hardware to report that the stream entered reset */
> + snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val & SD_CTL_STREAM_RESET), 3, 300);
>
> if (azx_dev->bus->dma_stop_delay && dma_run_state)
> udelay(azx_dev->bus->dma_stop_delay);
>
> - val &= ~SD_CTL_STREAM_RESET;
> - snd_hdac_stream_writeb(azx_dev, SD_CTL, val);
> - udelay(3);
> + snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0);
>
> - timeout = 300;
> - /* waiting for hardware to report that the stream is out of reset */
> - do {
> - val = snd_hdac_stream_readb(azx_dev, SD_CTL) &
> - SD_CTL_STREAM_RESET;
> - if (!val)
> - break;
> - } while (--timeout);
> + /* wait for hardware to report that the stream is out of reset */
> + snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val & SD_CTL_STREAM_RESET), 3, 300);
>
> /* reset first position - may not be synced with hw at this time */
> if (azx_dev->posbuf)

\
 
 \ /
  Last update: 2022-08-17 15:22    [W:0.191 / U:0.096 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site