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Subject[RFT PATCH 12/14] arm64: dts: qcom: qcs404: switch TCSR mutex to MMIO
Date
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:

qcom/qcs404-evb-4000.dtb: hwlock: 'reg' is a required property
qcom/qcs404-evb-4000.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 9ab990061522..3a94eb2cc448 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -295,12 +295,6 @@ smem {
hwlocks = <&tcsr_mutex 3>;
};

- tcsr_mutex: hwlock {
- compatible = "qcom,tcsr-mutex";
- syscon = <&tcsr_mutex_regs 0 0x1000>;
- #hwlock-cells = <1>;
- };
-
soc: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
@@ -726,9 +720,10 @@ gcc: clock-controller@1800000 {
assigned-clock-rates = <19200000>;
};

- tcsr_mutex_regs: syscon@1905000 {
- compatible = "syscon";
+ tcsr_mutex: hwlock@1905000 {
+ compatible = "qcom,tcsr-mutex";
reg = <0x01905000 0x20000>;
+ #hwlock-cells = <1>;
};

tcsr: syscon@1937000 {
--
2.34.1
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