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    Subject[PATCH 5.19 0687/1157] iio: dac: ad8801: Fix alignment for DMA safety
    Date
    From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

    [ Upstream commit 1c20292c6b60cfc60a5e652174b8063e5cc03fec ]

    ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
    on platforms with 128 byte cachelines above L1. Switch to the updated
    IIO_DMA_MINALIGN definition.

    Fixes: 7f270bc9a2d9 ("iio: dac: AD8801: add Analog Devices AD8801/AD8803 support")
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
    Acked-by: Nuno Sá <nuno.sa@analog.com>
    Link: https://lore.kernel.org/r/20220508175712.647246-59-jic23@kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/iio/dac/ad8801.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/iio/dac/ad8801.c b/drivers/iio/dac/ad8801.c
    index 6be35c92d435..919e8c880697 100644
    --- a/drivers/iio/dac/ad8801.c
    +++ b/drivers/iio/dac/ad8801.c
    @@ -26,7 +26,7 @@ struct ad8801_state {
    struct regulator *vrefh_reg;
    struct regulator *vrefl_reg;

    - __be16 data ____cacheline_aligned;
    + __be16 data __aligned(IIO_DMA_MINALIGN);
    };

    static int ad8801_spi_write(struct ad8801_state *state,
    --
    2.35.1


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