lkml.org 
[lkml]   [2022]   [Aug]   [16]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 5.19 0684/1157] iio: dac: ad5791: Fix alignment for DMA saftey
    Date
    From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

    [ Upstream commit b2d5e9de77c8774a5a6cff59d928f2fa38cbc642 ]

    ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
    on platforms with 128 byte cachelines above L1. Switch to the updated
    IIO_DMA_MINALIGN definition.

    Fixes: 791bb52a0cd2 ("iio:ad5791: Do not store transfer buffers on the stack")
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
    Acked-by: Nuno Sá <nuno.sa@analog.com>
    Link: https://lore.kernel.org/r/20220508175712.647246-56-jic23@kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/iio/dac/ad5791.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/iio/dac/ad5791.c b/drivers/iio/dac/ad5791.c
    index 339564fe47d1..a4167454da81 100644
    --- a/drivers/iio/dac/ad5791.c
    +++ b/drivers/iio/dac/ad5791.c
    @@ -95,7 +95,7 @@ struct ad5791_state {
    union {
    __be32 d32;
    u8 d8[4];
    - } data[3] ____cacheline_aligned;
    + } data[3] __aligned(IIO_DMA_MINALIGN);
    };

    enum ad5791_supported_device_ids {
    --
    2.35.1


    \
     
     \ /
      Last update: 2022-08-16 06:37    [W:4.026 / U:0.276 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site