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    Subject[PATCH 5.15 204/779] arm64: tegra: Update Tegra234 BPMP channel addresses
    Date
    From: Mikko Perttunen <mperttunen@nvidia.com>

    [ Upstream commit 98094be152d34f8014ca67fbdc210e5261c4b09d ]

    On final Tegra234 systems, shared memory for communication with BPMP is
    located at offset 0x70000 in SYSRAM.

    Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/nvidia/tegra234.dtsi | 12 ++++++------
    1 file changed, 6 insertions(+), 6 deletions(-)

    diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
    index 28961ed31d87..144a7eb699a7 100644
    --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
    +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
    @@ -124,19 +124,19 @@ gic: interrupt-controller@f400000 {

    sram@40000000 {
    compatible = "nvidia,tegra234-sysram", "mmio-sram";
    - reg = <0x0 0x40000000 0x0 0x50000>;
    + reg = <0x0 0x40000000 0x0 0x80000>;
    #address-cells = <1>;
    #size-cells = <1>;
    - ranges = <0x0 0x0 0x40000000 0x50000>;
    + ranges = <0x0 0x0 0x40000000 0x80000>;

    - cpu_bpmp_tx: sram@4e000 {
    - reg = <0x4e000 0x1000>;
    + cpu_bpmp_tx: sram@70000 {
    + reg = <0x70000 0x1000>;
    label = "cpu-bpmp-tx";
    pool;
    };

    - cpu_bpmp_rx: sram@4f000 {
    - reg = <0x4f000 0x1000>;
    + cpu_bpmp_rx: sram@71000 {
    + reg = <0x71000 0x1000>;
    label = "cpu-bpmp-rx";
    pool;
    };
    --
    2.35.1


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