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SubjectRe: [PATCH 1/5] sched/fair: ignore SIS_UTIL when has idle core
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Hi Chen, thanks for your testing!

On 8/10/22 9:50 PM, Chen Yu Wrote:
> On Tue, Jul 12, 2022 at 4:45 PM Abel Wu <wuyun.abel@bytedance.com> wrote:
>>
>> When SIS_UTIL is enabled, SIS domain scan will be skipped if
>> the LLC is overloaded. Since the overloaded status is checked
>> in the load balancing at LLC level, the interval is llc_size
>> miliseconds. The duration might be long enough to affect the
>> overall system throughput if idle cores are out of reach in
>> SIS domain scan.
>>
>> Signed-off-by: Abel Wu <wuyun.abel@bytedance.com>
>> ---
>>
> Tested schbench and netperf on latest 5.19 vanilla, it seems that there
> is latency performance improvement when the load is low in schbench,
> and no performance difference on netperf.
>
> ./report.py -b 5.19.0+ -c 5.19.0-skip-sis-util+ -t schbench
>
> schbench
> ========
> case load baseline(std%) compare%( std%)
> normal mthread-1 1.00 ( 0.00) +7.69 ( 0.00)
> normal mthread-2 1.00 ( 0.00) +13.24 ( 0.00)
> normal mthread-4 1.00 ( 0.00) -5.88 ( 0.00)
> normal mthread-8 1.00 ( 0.00) -0.25 ( 0.00)
>
>
> ./report.py -b 5.19.0+ -c 5.19.0-skip-sis-util+ -t netperf
> netperf
> =======
> case load baseline(std%) compare%( std%)
> TCP_RR thread-28 1.00 ( 0.62) +0.15 ( 0.55)
> TCP_RR thread-56 1.00 ( 0.42) -0.26 ( 0.40)
> TCP_RR thread-84 1.00 ( 0.29) +0.39 ( 0.29)
> TCP_RR thread-112 1.00 ( 0.22) +0.44 ( 0.23)
> TCP_RR thread-140 1.00 ( 0.17) +0.33 ( 0.18)
> TCP_RR thread-168 1.00 ( 0.17) +0.19 ( 0.16)
> TCP_RR thread-196 1.00 ( 13.65) -0.62 ( 14.83)
> TCP_RR thread-224 1.00 ( 9.80) -0.65 ( 9.67)
> UDP_RR thread-28 1.00 ( 0.89) +0.92 ( 0.81)
> UDP_RR thread-56 1.00 ( 0.78) +0.38 ( 0.73)
> UDP_RR thread-84 1.00 ( 14.03) +0.78 ( 16.85)
> UDP_RR thread-112 1.00 ( 12.26) -0.42 ( 11.95)
> UDP_RR thread-140 1.00 ( 9.86) -0.89 ( 6.93)
> UDP_RR thread-168 1.00 ( 11.62) -0.82 ( 8.80)
> UDP_RR thread-196 1.00 ( 19.47) +0.42 ( 16.50)
> UDP_RR thread-224 1.00 ( 18.68) +0.72 ( 18.50)
>
>
> Tested-by: Chen Yu <yu.c.chen@intel.com>
>

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