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SubjectRe: [PATCH v2 5/9] clk: samsung: exynos850: Implement CMU_AUD domain
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On 09/08/2022 14:33, Sam Protsenko wrote:
> CMU_AUD clock domain provides clocks for ABOX IP-core (audio subsystem).
> According to Exynos850 TRM, CMU_AUD generates Cortex-A32 clock, bus
> clock and audio clocks for BLK_AUD.
>
> This patch adds next clocks:
> - bus clocks in CMU_TOP needed for CMU_AUD
> - all internal CMU_AUD clocks
> - leaf clocks for Cortex-A32, Speedy FM, UAIF0..UAIF6 (Unified Audio
> Interface), CNT (counter), ABOX IP-core, ASB (Asynchronous Bridge),
> DAP (Debug Access Port), I2S Codec MCLK, D_TZPC (TrustZone
> Protection Controller), GPIO, PPMU (Platform Performance Monitoring
> Unit), SysMMU, SysReg and WDT
>
> ABOX clock was marked as CLK_IGNORE_UNUSED, as system hangs on boot
> otherwise. Once ABOX driver is implemented, maybe it can be handled
> there instead.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

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