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    Subject[PATCH AUTOSEL 5.18 16/93] drm/amd/display: Fix dpp dto for disabled pipes
    Date
    From: Duncan Ma <duncan.ma@amd.com>

    [ Upstream commit d4965c53b95d7533dfc2309d2fc25838bd33220e ]

    [Why]
    When switching from 1 pipe to 4to1 mpc combine,
    DppDtoClk aren't enabled for the disabled pipes
    pior to programming the pipes. Upon optimizing
    bandwidth, DppDto are enabled causing intermittent
    underflow.

    [How]
    Update dppclk dto whenever pipe are flagged to
    enable.

    Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
    Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
    Reviewed-by: Hansen Dsouza <Hansen.Dsouza@amd.com>
    Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
    Signed-off-by: Duncan Ma <duncan.ma@amd.com>
    Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 ++++
    1 file changed, 4 insertions(+)

    diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
    index b627c41713cc..76decaed5acd 100644
    --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
    +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
    @@ -1412,11 +1412,15 @@ static void dcn20_update_dchubp_dpp(
    struct hubp *hubp = pipe_ctx->plane_res.hubp;
    struct dpp *dpp = pipe_ctx->plane_res.dpp;
    struct dc_plane_state *plane_state = pipe_ctx->plane_state;
    + struct dccg *dccg = dc->res_pool->dccg;
    bool viewport_changed = false;

    if (pipe_ctx->update_flags.bits.dppclk)
    dpp->funcs->dpp_dppclk_control(dpp, false, true);

    + if (pipe_ctx->update_flags.bits.enable)
    + dccg->funcs->update_dpp_dto(dccg, dpp->inst, pipe_ctx->plane_res.bw.dppclk_khz);
    +
    /* TODO: Need input parameter to tell current DCHUB pipe tie to which OTG
    * VTG is within DCHUBBUB which is commond block share by each pipe HUBP.
    * VTG is 1:1 mapping with OTG. Each pipe HUBP will select which VTG
    --
    2.35.1
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