Messages in this thread | | | Date | Thu, 11 Aug 2022 12:53:56 -0700 | From | "H. Peter Anvin" <> | Subject | Re: [PATCH] x86/asm: Force native_apic_mem_read to use mov |
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On August 11, 2022 11:00:10 AM PDT, Adam Dunlap <acdunlap@google.com> wrote: >Previously, when compiled with clang, native_apic_mem_read gets inlined >into __xapic_wait_icr_idle and optimized to a testl instruction. When >run in a VM with SEV-ES enabled, it attempts to emulate this >instruction, but the emulator does not support it. Instead, use inline >assembly to force native_apic_mem_read to use the mov instruction which >is supported by the emulator. > >Signed-off-by: Adam Dunlap <acdunlap@google.com> >Reviewed-by: Marc Orr <marcorr@google.com> >Reviewed-by: Jacob Xu <jacobhxu@google.com> >--- > arch/x86/include/asm/apic.h | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > >diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h >index 3415321c8240..281db79e76a9 100644 >--- a/arch/x86/include/asm/apic.h >+++ b/arch/x86/include/asm/apic.h >@@ -109,7 +109,18 @@ static inline void native_apic_mem_write(u32 reg, u32 v) > > static inline u32 native_apic_mem_read(u32 reg) > { >- return *((volatile u32 *)(APIC_BASE + reg)); >+ volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); >+ u32 out; >+ >+ /* >+ * Functionally, what we want to do is simply return *addr. However, >+ * this accesses an MMIO which may need to be emulated in some cases. >+ * The emulator doesn't necessarily support all instructions, so we >+ * force the read from addr to use a mov instruction. >+ */ >+ asm_inline("movl %1, %0" : "=r"(out) : "m"(*addr)); >+ >+ return out; > } > > extern void native_apic_wait_icr_idle(void);
As I recall, there are some variants which only support using the ax register, so if you are going to do this might as well go all the way and force a specific instruction with specific registers, like mov (%rdx),%rax (by analogy with the I/O registers.)
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