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SubjectRe: [PATCH v4 04/17] dt-bindings: PCI: dwc: Add max-link-speed common property
On Thu, 28 Jul 2022 17:34:14 +0300, Serge Semin wrote:
> In accordance with [1] DW PCIe controllers support up to Gen5 link speed.
> Let's add the max-link-speed property upper bound to 5 then. The DT
> bindings of the particular devices are expected to setup more strict
> constraint on that parameter.
>
> [1] Synopsys DesignWare Cores PCI Express Controller Databook, Version
> 5.40a, March 2019, p. 27
>
> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
>
> ---
>
> Changelog v3:
> - This is a new patch unpinned from the next one:
> https://lore.kernel.org/linux-pci/20220503214638.1895-2-Sergey.Semin@baikalelectronics.ru/
> by the Rob' request. (@Rob)
> ---
> Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml | 3 +++
> Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 2 ++
> Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml | 1 +
> 3 files changed, 6 insertions(+)
>

Reviewed-by: Rob Herring <robh@kernel.org>

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