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    SubjectRe: [PATCH RESEND v4 06/15] PCI: intel-gw: Drop manual DW PCIe controller version setup
    On Fri, Jun 24, 2022 at 05:39:38PM +0300, Serge Semin wrote:
    > Since the DW PCIe common code now supports the IP-core version
    > auto-detection there is no point manually setting the version up for the
    > controllers newer than v4.70a. In particular Intel GW PCIe platform code
    > can be set free from the manual version setup, which as a positive side
    > effect causes the private device data removal too.
    >
    > Suggested-by: Rob Herring <robh@kernel.org>
    > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>

    I don't have a hardware to test. But going by the DWC spec, this looks good to
    me.

    CCed the author of this driver, "Dilip Kota" in case he can confirm.

    Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

    Thanks,
    Mani

    >
    > ---
    >
    > Folks, I don't have Intel GW PCIe hw instance to test it out. Could you
    > please make sure this patch doesn't brake anything?
    >
    > Changelog v3:
    > - This is a new patch create as a result of the discussion:
    > https://lore.kernel.org/linux-pci/20220503214638.1895-6-Sergey.Semin@baikalelectronics.ru/
    > ---
    > drivers/pci/controller/dwc/pcie-intel-gw.c | 16 +---------------
    > 1 file changed, 1 insertion(+), 15 deletions(-)
    >
    > diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c
    > index 371b5aa189d1..a44f685ec94d 100644
    > --- a/drivers/pci/controller/dwc/pcie-intel-gw.c
    > +++ b/drivers/pci/controller/dwc/pcie-intel-gw.c
    > @@ -58,10 +58,6 @@
    > #define BUS_IATU_OFFSET SZ_256M
    > #define RESET_INTERVAL_MS 100
    >
    > -struct intel_pcie_soc {
    > - u32 pcie_ver;
    > -};
    > -
    > struct intel_pcie {
    > struct dw_pcie pci;
    > void __iomem *app_base;
    > @@ -394,13 +390,8 @@ static const struct dw_pcie_host_ops intel_pcie_dw_ops = {
    > .host_init = intel_pcie_rc_init,
    > };
    >
    > -static const struct intel_pcie_soc pcie_data = {
    > - .pcie_ver = DW_PCIE_VER_520A,
    > -};
    > -
    > static int intel_pcie_probe(struct platform_device *pdev)
    > {
    > - const struct intel_pcie_soc *data;
    > struct device *dev = &pdev->dev;
    > struct intel_pcie *pcie;
    > struct dw_pcie_rp *pp;
    > @@ -424,12 +415,7 @@ static int intel_pcie_probe(struct platform_device *pdev)
    > if (ret)
    > return ret;
    >
    > - data = device_get_match_data(dev);
    > - if (!data)
    > - return -ENODEV;
    > -
    > pci->ops = &intel_pcie_ops;
    > - pci->version = data->pcie_ver;
    > pp->ops = &intel_pcie_dw_ops;
    >
    > ret = dw_pcie_host_init(pp);
    > @@ -447,7 +433,7 @@ static const struct dev_pm_ops intel_pcie_pm_ops = {
    > };
    >
    > static const struct of_device_id of_intel_pcie_match[] = {
    > - { .compatible = "intel,lgm-pcie", .data = &pcie_data },
    > + { .compatible = "intel,lgm-pcie" },
    > {}
    > };
    >
    > --
    > 2.35.1
    >

    --
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