Messages in this thread Patch in this message | | | From | Jisheng Zhang <> | Subject | [PATCH] arm64: save movk instructions in mov_q when the lower 16|32 bits are all zero | Date | Sat, 9 Jul 2022 16:48:30 +0800 |
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Currently mov_q is used to move a constant into a 64-bit register, when the lower 16 or 32bits of the constant are all zero, the mov_q emits one or two useless movk instructions. If the mov_q macro is used in hot code path, we want to save the movk instructions as much as possible. For example, when CONFIG_ARM64_MTE is 'Y' and CONFIG_KASAN_HW_TAGS is 'N', the following code in __cpu_setup() routine is the pontential optimization target:
/* set the TCR_EL1 bits */ mov_q x10, TCR_MTE_FLAGS
Before the patch: mov x10, #0x10000000000000 movk x10, #0x40, lsl #32 movk x10, #0x0, lsl #16 movk x10, #0x0
After the patch: mov x10, #0x10000000000000 movk x10, #0x40, lsl #32
Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- arch/arm64/include/asm/assembler.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 8c5a61aeaf8e..09f408424cae 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -568,9 +568,13 @@ alternative_endif movz \reg, :abs_g3:\val movk \reg, :abs_g2_nc:\val .endif + .if ((((\val) >> 16) & 0xffff) != 0) movk \reg, :abs_g1_nc:\val .endif + .endif + .if (((\val) & 0xffff) != 0) movk \reg, :abs_g0_nc:\val + .endif .endm /* -- 2.34.1
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