Messages in this thread | | | From | Aidan MacDonald <> | Subject | Re: [PATCH v3 04/11] ASoC: jz4740-i2s: Handle independent FIFO flush bits | Date | Fri, 08 Jul 2022 16:30:55 +0100 |
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Mark Brown <broonie@kernel.org> writes:
> On Fri, Jul 08, 2022 at 11:42:57AM +0100, Aidan MacDonald wrote: >> On the JZ4740, there is a single bit that flushes (empties) both >> the transmit and receive FIFO. Later SoCs have independent flush >> bits for each FIFO, which allows us to flush the right FIFO when >> starting up a stream. >> >> This also fixes a bug: since we were only setting the JZ4740's >> flush bit, which corresponds to the TX FIFO flush bit on other >> SoCs, other SoCs were not having their RX FIFO flushed at all. >> >> Fixes: 967beb2e8777 ("ASoC: jz4740: Add jz4780 support") > > Fixes should generally be at the start of a patch series so they don't > end up depending on other patches needlessly.
Okay then, I'll refactor it to allow for easier backporting.
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