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SubjectRe: [PATCH] arm64: dts: broadcom: bcm4908: Fix cpu and timer node
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On 7/7/2022 7:18 PM, William Zhang wrote:
> Add spin-table enable-method and cpu-release-addr properties for
> cpu0 node. This is required by all ARMv8 SoC. Otherwise some
> bootloader like u-boot can not update cpu-release-addr and linux
> fails to start up secondary cpus.
>
> Also fix the cpu mask in the interrupts property of the timer node
> for dual core bcm4906 SoC.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>

This looks good, however can you split this into 2 different patches and
add for the first hunk:

Fixes: c8b404fb05dc ("arm64: dts: broadcom: bcm4908: add BCM4906 Netgear
R8000P DTS files")

and:

Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus
GT-AC5300 early DTS files")

for the second hunk to the commit message?

Thanks!

>
> ---
>
> arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi | 8 ++++++++
> arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 ++
> 2 files changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
> index 66023d553524..d084c33d5ca8 100644
> --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
> @@ -9,6 +9,14 @@ cpus {
> /delete-node/ cpu@3;
> };
>
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> pmu {
> compatible = "arm,cortex-a53-pmu";
> interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
> index a4be040a00c0..967d2cd3c3ce 100644
> --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
> @@ -29,6 +29,8 @@ cpu0: cpu@0 {
> device_type = "cpu";
> compatible = "brcm,brahma-b53";
> reg = <0x0>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0x0 0xfff8>;
> next-level-cache = <&l2>;
> };
>

--
Florian

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