Messages in this thread | | | From | Conor Dooley <> | Subject | [PATCH 0/5] RISC-V: Add cpu-map topology information nodes | Date | Tue, 5 Jul 2022 20:04:31 +0100 |
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From: Conor Dooley <conor.dooley@microchip.com>
It was reported to me that the Hive Unmatched incorrectly reports its topology to hwloc, but the StarFive VisionFive did in [0] & a subsequent off-list email from Brice (the hwloc maintainer). This turned out not to be entirely true, the /downstream/ version of the VisionFive does work correctly but not upstream, as the downstream devicetree has a cpu-map node that was added recently.
This series adds a cpu-map node to all upstream devicetrees, which I have tested on mpfs & fu540. The first patch is lifted directly from the downstream StarFive devicetree.
Thanks, Conor.
0: https://github.com/open-mpi/hwloc/issues/536
Conor Dooley (4): riscv: dts: sifive: Add fu540 topology information riscv: dts: sifive: Add fu740 topology information riscv: dts: microchip: Add mpfs' topology information riscv: dts: canaan: Add k210 topology information
Jonas Hahnfeld (1): riscv: dts: starfive: Add JH7100 CPU topology
arch/riscv/boot/dts/canaan/k210.dtsi | 12 +++++++++++ arch/riscv/boot/dts/microchip/mpfs.dtsi | 24 ++++++++++++++++++++++ arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 24 ++++++++++++++++++++++ arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 24 ++++++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7100.dtsi | 16 +++++++++++++-- 5 files changed, 98 insertions(+), 2 deletions(-)
base-commit: b6f1f2fa2bddd69ff46a190b8120bd440fd50563 -- 2.37.0
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