Messages in this thread |  | | From | Brad Larson <> | Date | Sun, 3 Jul 2022 14:14:21 -0700 | Subject | Re: [PATCH v5 12/15] spi: dw: Add support for AMD Pensando Elba SoC |
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Hi Andy,
On Tue, Jun 14, 2022 at 4:10 AM Andy Shevchenko <andy.shevchenko@gmail.com> wrote: > > On Mon, Jun 13, 2022 at 9:57 PM Brad Larson <brad@pensando.io> wrote: > ... > > > +/* > > + * Elba SoC does not use ssi, pin override is used for cs 0,1 and > > + * gpios for cs 2,3 as defined in the device tree. > > + * > > + * cs: | 1 0 > > + * bit: |---3-------2-------1-------0 > > + * | cs1 cs1_ovr cs0 cs0_ovr > > + */ > > > +#define ELBA_SPICS_SHIFT(cs) (2 * (cs)) > > Useless.It takes much more than simply multiplying each time in two > macros. Also see below. > > > +#define ELBA_SPICS_MASK(cs) (0x3 << ELBA_SPICS_SHIFT(cs)) > > (GENMASK(1, 0) << ((cs) << 1)) > > Or ((cs) * 2) to show that it takes 2 bits and not two times of CS', > > > +#define ELBA_SPICS_SET(cs, val) \ > > + ((((val) << 1) | 0x1) << ELBA_SPICS_SHIFT(cs)) > > BIT(0) > > So the main point is to use GENMASK() and BIT() the rest is up to you.
I think you're recommending this approach which I'll change to
static void dw_spi_elba_override_cs(struct dw_spi_elba *dwselba, int cs, int enable) { regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG, (GENMASK(1, 0) << ((cs) << 1)), ((enable) << 1 | BIT(0)) << ((cs) << 1)); }
Regards, Brad
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