Messages in this thread | | | Date | Thu, 28 Jul 2022 15:04:01 +0300 | Subject | Re: [PATCH v3 2/2] drm/tidss: Add support for AM625 DSS | From | Tomi Valkeinen <> |
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On 27/06/2022 18:12, Aradhya Bhatia wrote: > Add support for the DSS IP on TI's new AM625 SoC in the tidss driver. > > Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> > Reviewed-by: Rahul T R <r-ravikumar@ti.com> > --- > drivers/gpu/drm/tidss/tidss_dispc.c | 56 ++++++++++++++++++++++++++++- > drivers/gpu/drm/tidss/tidss_dispc.h | 2 ++ > drivers/gpu/drm/tidss/tidss_drv.c | 1 + > 3 files changed, 58 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c > index dae47853b728..f084f0688a54 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc.c > +++ b/drivers/gpu/drm/tidss/tidss_dispc.c > @@ -272,6 +272,55 @@ const struct dispc_features dispc_j721e_feats = { > .vid_order = { 1, 3, 0, 2 }, > }; > > +const struct dispc_features dispc_am625_feats = { > + .max_pclk_khz = { > + [DISPC_VP_DPI] = 165000, > + [DISPC_VP_OLDI] = 165000, > + }, > + > + .scaling = { > + .in_width_max_5tap_rgb = 1280, > + .in_width_max_3tap_rgb = 2560, > + .in_width_max_5tap_yuv = 2560, > + .in_width_max_3tap_yuv = 4096, > + .upscale_limit = 16, > + .downscale_limit_5tap = 4, > + .downscale_limit_3tap = 2, > + /* > + * The max supported pixel inc value is 255. The value > + * of pixel inc is calculated like this: 1+(xinc-1)*bpp. > + * The maximum bpp of all formats supported by the HW > + * is 8. So the maximum supported xinc value is 32, > + * because 1+(32-1)*8 < 255 < 1+(33-1)*4. > + */ > + .xinc_max = 32, > + }, > + > + .subrev = DISPC_AM625, > + > + .common = "common", > + .common_regs = tidss_am65x_common_regs, > + > + .num_vps = 2, > + .vp_name = { "vp1", "vp2" }, > + .ovr_name = { "ovr1", "ovr2" }, > + .vpclk_name = { "vp1", "vp2" }, > + .vp_bus_type = { DISPC_VP_OLDI, DISPC_VP_DPI },
This looks correct, but with the two OLDI TXes, I think there will be some interesting issues.
The tidss_kms.c associates a DSS VP and a DT port, but that's no longer true if you add the ports for both OLDI TXes, as they both use the same VP. I think fixing that won't affect this patch, though, and merging this patch will, afaik, enable similar DSS functionality as we have for AM65x.
So, I think these two patches could be merged, or we could wait a bit until the OLDI situation becomes more clear. Up to you. In any case, for both patches:
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Tomi
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