Messages in this thread | | | Date | Wed, 20 Jul 2022 10:30:38 -0500 | Subject | Re: [PATCH v3 RESEND 0/6] Add support for upcoming chips to k10temp and amd_nb | From | "Limonciello, Mario" <> |
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On 7/20/2022 10:22, Guenter Roeck wrote: > On 7/20/22 07:45, Borislav Petkov wrote: >> On Tue, Jul 19, 2022 at 02:52:50PM -0500, Mario Limonciello wrote: >>> This series started as what looked like a correction to previous >>> commits, but I missed that the previous commits were for a different >>> family with the same chip models. So while fixing up the series I also >>> noticed that a few upcoming chips have new PCIe IDs and CCD offsets not >>> yet supported, so add them to amd_nb/k10temp. >>> >>> v2->v3 >>> * Pick up tags >>> * Group "ROOT" PCI IDs with others in patches 2 and 3. >>> v1->v2: >>> * Correct commit messages >>> * Add more missing chips and offsets >>> * since so much changed, do not include Bjorn's Ack. >>> >>> V3 original submission: >>> * >>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Flkml%2F20220613192956.4911-1-mario.limonciello%40amd.com%2F%23t&data=05%7C01%7Cmario.limonciello%40amd.com%7Cccd318a2336a4fff464e08da6a63adf5%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637939273635072576%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=WHsUYbBtu0ka4S2jiji%2BKaFycbTAHz%2B1RoANXo4maf0%3D&reserved=0 >>> >>> >>> Mario Limonciello (6): >>> x86/amd_nb: Add AMD Family 17h A0-AF IDs >>> x86/amd_nb: Add Family 19h model 70h-7Fh IDs >>> x86/amd_nb: Add Family 19h model 60h-6Fh IDs >>> hwmon: (k10temp): Add support for family 17h models A0h-AFh >>> hwmon: (k10temp): Add support for family 19h models 70h-7Fh >>> hwmon: (k10temp): Add support for family 19h models 60h-6Fh >> >> Is there any particular reason why those are split into such small >> pieces? >> >> I'd expect one patch adding all PCI IDs and a second patch doing the >> k10temp changes. >> >> If no particular reason, I'll compact them all 6 into 2. >> > Ok with me. >
It was mostly for review purpose so that other AMD guys could comment if I fumbled the DID or offsets for a product or if someone wanted to test it independently on a particular product but didn't have the others to test.
At this point that's fine with me too to combine them; thanks.
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