Messages in this thread | | | From | Hongxing Zhu <> | Subject | RE: [RFC 2/2] PCI: imx6: Support more than Gen2 speed link mode | Date | Wed, 20 Jul 2022 03:07:40 +0000 |
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> -----Original Message----- > From: Hongxing Zhu <hongxing.zhu@nxp.com> > Sent: 2022年7月20日 9:44 > To: tharvey@gateworks.com > Cc: Lucas Stach <l.stach@pengutronix.de>; bhelgaas@google.com; Lorenzo > Pieralisi <lorenzo.pieralisi@arm.com>; Fabio Estevam <festevam@gmail.com>; > linux-pci@vger.kernel.org; Linux ARM Mailing List > <linux-arm-kernel@lists.infradead.org>; open list > <linux-kernel@vger.kernel.org>; Sascha Hauer <kernel@pengutronix.de>; > dl-linux-imx <linux-imx@nxp.com> > Subject: RE: [RFC 2/2] PCI: imx6: Support more than Gen2 speed link mode > > > -----Original Message----- > > From: Tim Harvey <tharvey@gateworks.com> > > Sent: 2022年7月20日 8:59 > > To: Hongxing Zhu <hongxing.zhu@nxp.com> > > Cc: Lucas Stach <l.stach@pengutronix.de>; bhelgaas@google.com; Lorenzo > > Pieralisi <lorenzo.pieralisi@arm.com>; Fabio Estevam > > <festevam@gmail.com>; linux-pci@vger.kernel.org; Linux ARM Mailing > > List <linux-arm-kernel@lists.infradead.org>; open list > > <linux-kernel@vger.kernel.org>; Sascha Hauer <kernel@pengutronix.de>; > > dl-linux-imx <linux-imx@nxp.com> > > Subject: Re: [RFC 2/2] PCI: imx6: Support more than Gen2 speed link > > mode > > > > On Wed, May 18, 2022 at 2:49 AM Richard Zhu <hongxing.zhu@nxp.com> > > wrote: > > > > > > Support more than Gen2 speed link mode, since i.MX8MP PCIe supports > > > up to Gen3 link speed. > > > > > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > > --- > > > drivers/pci/controller/dwc/pci-imx6.c | 4 ++-- > > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c > > > b/drivers/pci/controller/dwc/pci-imx6.c > > > index 30641d2dda14..37012f9a33a0 100644 > > > --- a/drivers/pci/controller/dwc/pci-imx6.c > > > +++ b/drivers/pci/controller/dwc/pci-imx6.c > > > @@ -809,8 +809,8 @@ static int imx6_pcie_start_link(struct dw_pcie > > > *pci) > > > > > > dw_pcie_wait_for_link(pci); > > > > > > - if (pci->link_gen == 2) { > > > - /* Allow Gen2 mode after the link is up. */ > > > + if (pci->link_gen > 1) { > > > + /* Allow faster modes after the link is up. */ > > > dw_pcie_dbi_ro_wr_en(pci); > > > tmp = dw_pcie_readl_dbi(pci, offset + > PCI_EXP_LNKCAP); > > > tmp &= ~PCI_EXP_LNKCAP_SLS; > > > -- > > > > Richard, > > > > I noticed that your imx8mp pcie series [1] will force the imx8mp to > > link only at > > gen1 speeds unless support like the above is added. I believe you > > would also need the following: > > - tmp |= PCI_EXP_LNKCAP_SLS_5_0GB; > > + tmp |= pci->link_gen; > > > > When I used this along with your imx8mp series however I only get a gen1 > link. > > > > Have you made any progress on a v3 of your imx8mp series? Missing one in previous reply. I still didn't know how to encapsulate the PLL bits related operations of HSIOMIX to one clock suggested by Lucas [1]. [1] https://patchwork.ozlabs.org/project/linux-pci/patch/1646644054-24421-4-git-send-email-hongxing.zhu@nxp.com/ I'm prepare the i.MX EP RC patch-set reviewing, and plan to look at i.MX8MP series after the EP RC patch-set is settle down.
Best Regards Richard Zhu > > > > Do you know if the downstream NXP vendor kernel [2] supports imx8mp > > Gen3 links? > Hi Tim: > Thanks for your timely reminder. I just was puzzled a while why only Gen1 is > linked up on i.MX8MP. > Root cause is that I forget merge some local changes to the up-stream codes. > BTW, the local codes supports the Gen3 link on i.MX8MP A1 chip or later. > Since the A0 chip PCIe only supports up to Gen2 link speed. > > Best Regards > Richard Zhu > > > > > Best Regards, > > > > Tim > > [1] > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc > > hw > > > ork.kernel.org%2Fproject%2Flinux-pci%2Flist%2F%3Fseries%3D620887%26sta > > > te%3D*&data=05%7C01%7Chongxing.zhu%40nxp.com%7C9c7b11f2599 > > > 645f62dd608da69eb1455%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7 > > > C0%7C637938755629962307%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 > > > wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7 > > > C%7C%7C&sdata=I3PwnRO56jV7yKW0Al16C%2F%2FY5GupiyIifdK%2FE2 > > 2AiSs%3D&reserved=0 > > [2] > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsource. > > > codeaurora.org%2Fexternal%2Fimx%2Flinux-imx%2F&data=05%7C01%7 > > > Chongxing.zhu%40nxp.com%7C9c7b11f2599645f62dd608da69eb1455%7C68 > > > 6ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637938755629962307%7 > > > CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT > > > iI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=PUul%2F8b > > 6%2FtRjJMHOOHcm7Jb1BXwGi%2FVnLnWmKCeNeo4%3D&reserved=0
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