Messages in this thread | | | Subject | Re: [PATCH V15 01/15] ACPICA: MADT: Add LoongArch APICs support | From | Jianmin Lv <> | Date | Mon, 18 Jul 2022 20:28:11 +0800 |
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On 2022/7/17 上午2:10, Marc Zyngier wrote: > [+ Robert Moore] > > On Fri, 15 Jul 2022 08:05:37 +0100, > Jianmin Lv <lvjianmin@loongson.cn> wrote: >> >> From: Huacai Chen <chenhuacai@loongson.cn> >> >> LoongArch-specific interrupt controllers (similar to APIC) are added >> in the next revision of ACPI Specification (current revision is 6.4), >> which including CORE_PIC (CPUINTC), LIO_PIC (LIOINTC), EIO_PIC (EIOINTC), >> HT_PIC (HTVECINTC), BIO_PIC (PCHINTC), LPC_PIC (PCHLPC) and MSI_PIC >> (PCHMSI). This patch add their definition. >> >> ACPI changes of LoongArch-specific interrupt controllers have already >> been approved in the ECRs, and will be public in the next revision of >> ACPI Specification. >> >> Reference: https://mantis.uefi.org/mantis/view.php?id=2203 >> Reference: https://mantis.uefi.org/mantis/view.php?id=2313 >> >> Above links needs login(available for ASWG), so the following link( >> the ECR file for adding LoongArch APICs into ACPI spec) is provided >> for public: >> >> https://github.com/lvjianmin-loongson/acpica/blob/master/Add%20APIC%20Structures%20for%20Loongarch%20in%20MADT-rev3.pdf >> >> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> >> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> > > Since the ACPI maintainers are unwilling to take this patch (for > undisclosed reasons), we need something to unblock this sorry > situation, as I don't think it is fair on the LoongArch folks to be > blocked for another cycle on this ground only. > > I'm proposing to replace this patch with the following, which will > allow the patches to be merged without breaking anything. Once the > ACPI support is updated, we'll be able to simply revert this patch. > > Thanks, > > M. > > From 43ec25d2dbde3c422cce430c9d5ec32fbe7b255c Mon Sep 17 00:00:00 2001 > From: Marc Zyngier <maz@kernel.org> > Date: Sat, 16 Jul 2022 18:56:10 +0100 > Subject: [PATCH] LoongArch: Provisionally add ACPICA data structures > > The LoongArch architecture is using ACPI, but the spec containing > the required updates still is in an unreleased state. > > Instead of preventing the inclusion of the IRQ support into the > kernel, add the missing bits to the arch-specific parts of > the ACPICA support. > > Once the ACPICA bits are updated to the version that supports > LoongArch, these bits can eventually be removed. > > Signed-off-by: Marc Zyngier <maz@kernel.org> > --- > arch/loongarch/include/asm/acpi.h | 138 ++++++++++++++++++++++++++++++ > 1 file changed, 138 insertions(+) > > diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h > index 62044cd5b7bc..6155e46098af 100644 > --- a/arch/loongarch/include/asm/acpi.h > +++ b/arch/loongarch/include/asm/acpi.h > @@ -31,6 +31,144 @@ static inline bool acpi_has_cpu_in_madt(void) > > extern struct list_head acpi_wakeup_device_list; > > +/* > + * Temporary definitions until the core ACPICA code gets updated (see > + * 1656837932-18257-1-git-send-email-lvjianmin@loongson.cn and its > + * follow-ups for the "rationale"). > + * > + * Once the "legal reasons" are cleared and that the code is merged, > + * this can be dropped entierely. > + */ > +#if (ACPI_CA_VERSION == 0x20220331 && !defined(LOONGARCH_ACPICA_EXT)) > + > +#define LOONGARCH_ACPICA_EXT 1 > + > +#define ACPI_MADT_TYPE_CORE_PIC 17 > +#define ACPI_MADT_TYPE_LIO_PIC 18 > +#define ACPI_MADT_TYPE_HT_PIC 19 > +#define ACPI_MADT_TYPE_EIO_PIC 20 > +#define ACPI_MADT_TYPE_MSI_PIC 21 > +#define ACPI_MADT_TYPE_BIO_PIC 22 > +#define ACPI_MADT_TYPE_LPC_PIC 23 > + > +/* Values for Version field above */ > + > +enum acpi_madt_core_pic_version { > + ACPI_MADT_CORE_PIC_VERSION_NONE = 0, > + ACPI_MADT_CORE_PIC_VERSION_V1 = 1, > + ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ > +}; > + > +enum acpi_madt_lio_pic_version { > + ACPI_MADT_LIO_PIC_VERSION_NONE = 0, > + ACPI_MADT_LIO_PIC_VERSION_V1 = 1, > + ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ > +}; > + > +enum acpi_madt_eio_pic_version { > + ACPI_MADT_EIO_PIC_VERSION_NONE = 0, > + ACPI_MADT_EIO_PIC_VERSION_V1 = 1, > + ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ > +}; > + > +enum acpi_madt_ht_pic_version { > + ACPI_MADT_HT_PIC_VERSION_NONE = 0, > + ACPI_MADT_HT_PIC_VERSION_V1 = 1, > + ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ > +}; > + > +enum acpi_madt_bio_pic_version { > + ACPI_MADT_BIO_PIC_VERSION_NONE = 0, > + ACPI_MADT_BIO_PIC_VERSION_V1 = 1, > + ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ > +}; > + > +enum acpi_madt_msi_pic_version { > + ACPI_MADT_MSI_PIC_VERSION_NONE = 0, > + ACPI_MADT_MSI_PIC_VERSION_V1 = 1, > + ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ > +}; > + > +enum acpi_madt_lpc_pic_version { > + ACPI_MADT_LPC_PIC_VERSION_NONE = 0, > + ACPI_MADT_LPC_PIC_VERSION_V1 = 1, > + ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ > +}; > +
Hi, Marc, I add #pragma here to make following structures align to 1 byte as include/acpi/actbl2.h, or else, the MADT will not be parsed correctly.
#pragma pack(1)
> +/* Core Interrupt Controller */ > + > +struct acpi_madt_core_pic { > + struct acpi_subtable_header header; > + u8 version; > + u32 processor_id; > + u32 core_id; > + u32 flags; > +}; > + > +/* Legacy I/O Interrupt Controller */ > + > +struct acpi_madt_lio_pic { > + struct acpi_subtable_header header; > + u8 version; > + u64 address; > + u16 size; > + u8 cascade[2]; > + u32 cascade_map[2]; > +}; > + > +/* Extend I/O Interrupt Controller */ > + > +struct acpi_madt_eio_pic { > + struct acpi_subtable_header header; > + u8 version; > + u8 cascade; > + u8 node; > + u64 node_map; > +}; > + > +/* HT Interrupt Controller */ > + > +struct acpi_madt_ht_pic { > + struct acpi_subtable_header header; > + u8 version; > + u64 address; > + u16 size; > + u8 cascade[8]; > +}; > + > +/* Bridge I/O Interrupt Controller */ > + > +struct acpi_madt_bio_pic { > + struct acpi_subtable_header header; > + u8 version; > + u64 address; > + u16 size; > + u16 id; > + u16 gsi_base; > +}; > + > +/* MSI Interrupt Controller */ > + > +struct acpi_madt_msi_pic { > + struct acpi_subtable_header header; > + u8 version; > + u64 msg_address; > + u32 start; > + u32 count; > +}; > + > +/* LPC Interrupt Controller */ > + > +struct acpi_madt_lpc_pic { > + struct acpi_subtable_header header; > + u8 version; > + u64 address; > + u16 size; > + u8 cascade; > +}; > +
#pragma pack()
> +#endif > + > #endif /* !CONFIG_ACPI */ > > #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT >
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