Messages in this thread | | | From | Thomas Gleixner <> | Subject | Re: [patch 02/38] x86/cpu: Use native_wrmsrl() in load_percpu_segment() | Date | Mon, 18 Jul 2022 13:42:50 +0200 |
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On Mon, Jul 18 2022 at 12:33, Thomas Gleixner wrote: > On Mon, Jul 18 2022 at 11:31, Peter Zijlstra wrote: >> On Mon, Jul 18, 2022 at 10:55:29AM +0200, Thomas Gleixner wrote: >>> On Mon, Jul 18 2022 at 08:54, Thomas Gleixner wrote: >>> > On Mon, Jul 18 2022 at 07:11, Juergen Gross wrote: >>> >>> - switch_to_new_gdt(cpu); >>> >>> + switch_to_real_gdt(cpu); >>> >> >>> >> ... can't you use the paravirt variant of load_gdt in switch_to_real_gdt() ? >>> > >>> > That does not solve the problem of having a disagreement between GDT and >>> > GS_BASE. Let me dig into this some more. >>> >>> Bah. The real problem is __loadsegment_simple(gs, 0). After that GS_BASE >>> is 0. So any per CPU access before setting MSR_GS_BASE back to working >>> state is going into lala land. >>> >>> So it's not the GDT. It's the mov 0, %gs which makes stuff go south, but >>> as %gs is already 0, we can keep the paravirt load_gdt() and use >>> native_write_msr() and everything should be happy. >> >> How is the ret from xen_load_gdt() not going to explode? > > This is only for the early boot _before_ all the patching happens. So > that goes through the default retthunk. > > Secondary CPUs do not need that as they set up GDT and GS_BASE in the > low level asm code before coming out to C. > > I'm still trying to figure out how this works on XENPV and on 32bit.
On 32bit the CPU comes out with GDT and FS correctly set too.
For XEN_PV it looks like cpu_initialize_context() hands down GDT and GSBASE info to the hypercall which kicks the CPU so we should be good there as well. Emphasis on should. Jürgen?
Thanks,
tglx
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