Messages in this thread | | | Date | Mon, 18 Jul 2022 18:18:57 -0400 | From | Nícolas F. R. A. Prado <> | Subject | Re: [PATCH v2 1/2] clk: core: Honor CLK_OPS_PARENT_ENABLE for clk gate ops |
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On Wed, Jul 13, 2022 at 04:21:10PM +0800, Chen-Yu Tsai wrote: > In the previous commits that added CLK_OPS_PARENT_ENABLE, support for > this flag was only added to rate change operations (rate setting and > reparent) and disabling unused subtree. It was not added to the > clock gate related operations. Any hardware driver that needs it for > these operations will either see bogus results, or worse, hang. > > This has been seen on MT8192 and MT8195, where the imp_ii2_* clk > drivers set this, but dumping debugfs clk_summary would cause it > to hang. > > Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)") > Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)") > Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested that MT8192 no longer hangs when dumping clk_summary.
Thanks, Nícolas
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