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Subject[PATCH] drivers: irqchip: Allocate alignment addr by ITS_BASER.Page_size
The description of the ITS_BASER.Physical_Address field in the ARM GIC spec is as 
"The address must be aligned to the size specified in the Page Size field."
The Page_Size field in ITS_BASER might be RO.

Currently, the address is aligned based on the system page_size, not the HW
Page_Size field. In some case, this is in contradiction with the spec.

For example:
ITS_BASER.Page_Size indicate 16K, and kernel page size is 4K.
If HW need 4K-size memory, the driver may alloc a 4K aligned address.
This has been proven in hardware.

Cc: Thomas Gleixner <>
Cc: Marc Zyngier <>
Signed-off-by: wangwudi <>
drivers/irqchip/irq-gic-v3-its.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 5ff09de6c48f..0e25e887d45c 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2310,6 +2310,9 @@ static int its_setup_baser(struct its_node *its, struct its_baser *baser,
order = get_order(GITS_BASER_PAGES_MAX * psz);

+ if ((psz > PAGE_SIZE) && (PAGE_ORDER_TO_SIZE(order) < psz)) {
+ order = get_order(psz);
+ }
page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order);
if (!page)
return -ENOMEM;
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