Messages in this thread | | | Date | Sat, 16 Jul 2022 19:39:46 +0100 | From | Marc Zyngier <> | Subject | Re: [PATCH V15 00/15] irqchip: Add LoongArch-related irqchip drivers |
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On Fri, 15 Jul 2022 08:05:36 +0100, Jianmin Lv <lvjianmin@loongson.cn> wrote: > > LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. > LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit > version (LA32S) and a 64-bit version (LA64). LoongArch use ACPI as its > boot protocol LoongArch-specific interrupt controllers (similar to APIC) > are already added in the ACPI Specification 6.5(which may be published in > early June this year and the board is reviewing the draft). > > Currently, LoongArch based processors (e.g. Loongson-3A5000) can only > work together with LS7A chipsets. The irq chips in LoongArch computers > include CPUINTC (CPU Core Interrupt Controller), LIOINTC (Legacy I/O > Interrupt Controller), EIOINTC (Extended I/O Interrupt Controller), > HTVECINTC (Hyper-Transport Vector Interrupt Controller), PCH-PIC (Main > Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller > in LS7A chipset) and PCH-MSI (MSI Interrupt Controller).
[...]
Compiling this series for loongarch with loongson3_defconfig on top of 5.19-rc3 results in the following:
loongarch64-linux-ld: drivers/irqchip/irq-loongson-eiointc.o: in function `.L60': irq-loongson-eiointc.c:(.init.text+0x4c): undefined reference to `pch_msi_acpi_init' loongarch64-linux-ld: drivers/irqchip/irq-loongson-htvec.o: in function `pch_msi_parse_madt': irq-loongson-htvec.c:(.init.text+0x14): undefined reference to `pch_msi_acpi_init' make: *** [Makefile:1164: vmlinux] Error 1
I *really* would have expected this series to be in a better shape after over 15 rounds, but it looks like I'm expecting too much. I haven't investigated the breakage, but this should (at the very least) pass the defconfig test and optional drivers not being selected.
The corresponding MIPS configuration seems to build fine.
M.
-- Without deviation from the norm, progress is not possible.
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