Messages in this thread | | | Date | Wed, 13 Jul 2022 16:28:57 +0200 | Subject | Re: [PATCH v1 2/2] pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver | From | Krzysztof Kozlowski <> |
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On 13/07/2022 15:35, Tomer Maimon wrote:
>>> +static int npcm8xx_pinctrl_probe(struct platform_device *pdev) >>> +{ >>> + struct npcm8xx_pinctrl *pctrl; >>> + int ret; >>> + >>> + pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); >>> + if (!pctrl) >>> + return -ENOMEM; >>> + >>> + pctrl->dev = &pdev->dev; >>> + dev_set_drvdata(&pdev->dev, pctrl); >>> + >>> + pctrl->gcr_regmap = >>> + syscon_regmap_lookup_by_compatible("nuvoton,npcm845-gcr"); >> >> No. Use property. By this patchset, I would expect that you learnt from >> previous mistakes around this. Why repeating the same trouble second time? > You suggest to use phandle property like nuvoton,sysgcr even that the > NPCM8XX pin controller driver is used only NPCM8XX SoC, so the only > GCR node in the NPCM8XX SoC is nuvoton,npcm845-gcr?
Yes. The previous case (reset driver, AFAIR) was also about driver used only in one SoC, wasn't it?
Best regards, Krzysztof
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